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| Si2456/SI2433/Si2414 V.90, V. 34, V. 32BIS I S OMODEM TM Features Data modem formats ITU-T, Bell 300 bps up to 56 kbps V.42, V.42bis, MNP2-5 Automatic rate negotiation WITH INTEGRATED GL O B A L DAA Integrated DAA Capacitive isolation Parallel phone detect Globally-compliant line interface Overcurrent detection Caller ID decode 3.3 V power No external ROM or RAM required UART with flow control AT command set support Fast connect Parallel interface Call progress support Firmware upgradeable Ordering Information This data sheet is valid only for those chipset combinations listed on page 81. Applications Set-top boxes Email terminals Point-of-sale terminals PVRs Security systems Remote monitoring Pin Assignments Si2456/33/14 CLKIN/XTALI XTALO CLKOUT/A0 D6 VD3.3 GND VDA RTS/D7 RXD/RD TXD/WR CTS/CS RESET 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 D5 DCD/D4 ESC/D3 C1A ISOB VD3.3 GND VDB D2 RI/D1 INT/D0 AOUT/INT Description The Si2456 is a complete, ITU-V.90-compliant, 56 kbps modem chipset with integrated direct access arrangement (DAA) that provides a programmable line interface to meet global telephone line requirements with a single design. Available in two small packages, it eliminates the need for a separate DSP data pump, external RAM and ROM, modem controller, analog front end (AFE), isolation transformer, relays, optoisolators, and 2- to 4-wire hybrid. The ISOmodemTM is ideal for embedded modem applications due to its small board space, low power consumption, and global compliance. The SI2433 and Si2414 products offer all the same features as the Si2456 with connect rates of up to 33.6 kbps and 14.4 kbps, respectively. Functional Block Diagram QE2 DCT CLKIN/XTALI CLKOUT RXD TXD CTS RTS DCD ESC RI INT CS WR RD A0 D0-D7 RESET PLL Clocking XTALO Si3015 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 FILT2 FILT RX REXT REXT2 REF VREG2 VREG IGND RAM Data Bus C1B RNG1 RNG2 QB DAA Interface Si3015 C1A Serial Interface QE To Phone Line Microcontroller DSP AOUT Parallel Interface ISOB Patents pending Rev. 0.9 9/02 Copyright (c) 2002 by Silicon Laboratories Si2456/SI2433/Si2414-DS09 Si2456/SI2433/Si2414 2 Rev. 0.9 Si2456/SI2433/Si2414 TABLE O F CONTENTS Section Page 4 11 12 14 18 19 19 19 19 20 20 23 24 28 36 36 36 36 36 36 37 37 39 39 39 41 43 49 65 67 72 73 76 77 79 81 82 83 84 86 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bill of Materials: Si2456/33/14 Chipset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parallel Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Command Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fast Connect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Clocking/Low Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AT Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Extended AT Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data Compression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Error Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Wire Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Caller ID Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UK Caller ID Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Japan Caller ID Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Force Caller ID Monitor (Always On) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parallel Phone Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Overcurrent Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Global Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Firmware Upgrades . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S-Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . User-Access Registers (U-Registers) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bit-Mapped U-Register Detail (defaults in bold) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parallel Interface Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Appendix A--DAA Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Appendix B--UL1950 3rd Edition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Appendix C--User-Access Register Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Appendix D--Typical Modem Applications Examples . . . . . . . . . . . . . . . . . . . . . . . . . Pin Descriptions: Si2456/33/14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Descriptions: Si3015 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package Outline: TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package Outline: SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Rev. 0.9 3 Si2456/SI2433/Si2414 Electrical Specifications Table 1. Recommended Operating Conditions Parameter1 Ambient Temperature Si2456/33/14 Supply Voltage, Digital3 Symbol TA VD Test Condition K-Grade Min2 0 3.0 Typ 25 3.3 Max2 70 3.6 Unit C V Notes: 1. The Si2456/33/14 specifications are guaranteed when the typical application circuit (including component tolerance) and any Si2456/33/14 and any Si3015 are used. See page 11 for typical application circuit. 2. All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions. Typical values apply at nominal supply voltages and an operating temperature of 25 C unless otherwise stated. 3. The digital supply, VD, operates from 3.0 to 3.6 V. The Si2456/33/14 interface supports 5 V logic (CLKIN/XTALI supports 3.3 V logic only). 4 Rev. 0.9 Si2456/SI2433/Si2414 Table 2. DAA Loop Characteristics (VD = 3.0 to 3.6 V, TA = 0 to 70 C for K-Grade) Parameter DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage On-Hook Leakage Current Operating Loop Current Operating Loop Current DC Ring Current2 Ring Detect Voltage3 Ring Detect Voltage Ring Frequency Ringer Equivalence Number4 3 Symbol VTR VTR VTR VTR VTR VTR VTR VTR ILK ILP ILP Test Condition IL = 20 mA, ACT1 = 1 DCT = 11 (CTR21) IL = 42 mA, ACT = 1 DCT = 11 (CTR21) IL = 50 mA, ACT = 1 DCT = 11 (CTR21) IL = 60 mA, ACT = 1 DCT = 11 (CTR21) IL = 20 mA, ACT = 0 DCT = 01 (Japan) IL = 100 mA, ACT = 0 DCT = 01 (Japan) IL = 20 mA, ACT = 0 DCT = 10 (FCC) IL = 100 mA, ACT = 0 DCT = 10 (FCC) VTR = -48 V FCC/Japan Modes CTR21 DC flowing through ring detection circuitry Min -- -- -- 40 -- 9 -- 9 -- 13 13 -- 11 17 15 -- Typ -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Max 7.5 14.5 40 -- 6.0 -- 7.5 -- 7 120 60 7 22 33 68 0.2 Unit V V V V V V V V A mA mA A Vrms Vrms Hz VRD VRD FR REN RT = 0 RT = 1 Notes: 1. ACT = U67, bit 5; DCT = U67, bits 3:2; RT = U67, bit 0; RZ = U67, bit 1. 2. R25 and R26 installed. 3. The ring signal is guaranteed to not be detected below the minimum. The ring signal is guaranteed to be detected above the maximum. 4. C15, R14, Z2, and Z3 not installed. RZ = 0. Rev. 0.9 5 Si2456/SI2433/Si2414 TIP + 600 Si3015 VTR 10 F - IL RING Figure 1. Test Circuit for Loop Characteristics Table 3. DC Characteristics, VD = 3.3 V (VD = 3.0 to 3.6 V, TA = 0 to 70 C for K-Grade) Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Pullup Resistance Pins 9, 11, 13, 16 Total Supply Current * Symbol VIH VIL VOH VOL IL RPU ID ID Test Condition Min 2.0 -- Typ -- -- -- -- -- 300 26 35 Max -- 0.8 -- 0.35 10 420 35 100 Unit V V V V A k mA A IO = -2 mA IO = 2 mA 2.4 -- -10 100 VD33 pin PDN = 1 -- -- Total Supply Current, Powerdown* *Note: All inputs at 0 or VD. All inputs held static except clock and all outputs unloaded (Static IOUT = 0 mA). 6 Rev. 0.9 Si2456/SI2433/Si2414 Table 4. DAA AC Characteristics (VD = 3.0 to 3.6 V, TA = 0 to 70 C for K-Grade) Parameter Sample Rate Crystal Oscillator Frequency Transmit Frequency Response Receive Frequency Response Transmit Full Scale Level Receive Full Scale Level Dynamic Range2,3,4 1 Symbol Fs FXTL Test Condition Min -- -- Typ 9.6 4.9152 5 5 1 1 82 83 84 -85 -76 -74 -82 40 40 0.7VDD 60 Max -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Unit kHz MHz Hz Hz VPEAK VPEAK dB dB dB dB dB dB dB dB dB VPP dB Low -3 dBFS Corner Low -3 dBFS Corner VFS VFS DR DR DR THD THD THD THD ACT5 = 0, = 10 (FCC) IL=100 mA DCT5 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1 Dynamic Range2,3,6 Dynamic Range2,3,4 Transmit Total Harmonic Distortion4,7 Transmit Total Harmonic Distortion5,7 Receive Total Harmonic Distortion6,7 Receive Total Harmonic Distortion4,7 AOUT Dynamic Range AOUT THD AOUT Full Scale Level AOUT Mute Level ACT = 0, DCT = 01 (Japan) IL = 20 mA ACT = 1, DCT = 11(CTR21) IL = 60 mA ACT = 0, DCT = 10 (FCC) IL = 100 mA ACT = 0, DCT = 01 (Japan) IL = 20 mA ACT = 0, DCT = 01 (Japan) IL = 20 mA ACT = 1, DCT = 11 (CTR21) IL = 60 mA VIN = 1 kHz VIN = 1 kHz Notes: 1. Measured at TIP and RING with 600 termination at 1 kHz. 2. DR = 20 x log |Vin| + 20 x log (RMS signal/RMS noise). 3. Measurement is 300 to 3400 Hz. Applies to transmit and receive paths. 4. Vin = 1 kHz, -3 dBFS, Fs = 10300 Hz. 5. ACT = U67, bit 5; DCT = U67, bits 3:2. 6. Vin = 1 kHz, -6 dBFS, Fs = 10300 Hz. 7. THD = 20 x log (RMS distortion/RMS signal). Rev. 0.9 7 Si2456/SI2433/Si2414 Table 5. Absolute Maximum Ratings Parameter DC Supply Voltage Input Current, Si2456/33/14 Digital Input Pins Digital Input Voltage CLKIN/XTALI Input Voltage Operating Temperature Range Storage Temperature Range Symbol VD IIN VIND VXIND TA TSTG Value 4.1 10 -0.3 to 5.3 -0.3 to (VD + 0.3) -10 to 100 -40 to 150 Unit V A V V C C Note: Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 6. Switching Characteristics (VD = 3.0 to 3.6 V, TA = 0 to 70 C for K-Grade) Parameter CLKOUT Output Clock Frequency Symbol tBD tRTH tRTS tCTH tRS tAT tAS tAH tWL tWDSU tWC tCSS tCSH tRL tRLDD tDH tDZ tRC Min 2.4576 -1 -- 10 -- 5.0 300 15 0 50 20 120 10 0 50 -- 10 -- 120 Typ -- Max 39.3216 1 -- -- -- -- -- -- -- -- -- -- -- -- -- 20 -- 30 -- Unit MHz Baud Rate Accuracy Start Bit to RTS CTS or RTS High to Start Bit Stop Bit to CTS RESET to RESET RESET to 1st AT Command Address Setup Address Hold WR Low Pulse Width Write Data Setup Time Write Cycle Time Chip Select Setup Chip Select Hold RD Low Pulse Width RD Low to Data Driven Time Data Hold RD High to Hi-Z Time Read Cycle Time -- 1/(2 x Baud Rate) -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- % ns ns ns ms ms ns ns ns ns ns ns ns ns ns ns ns ns Note: All timing is referenced to the 50% level of the waveform. Input test levels are VIH = VD - 0.4 V, VIL = 0.4 V 8 Rev. 0.9 Si2456/SI2433/Si2414 UART Time for Modem Receive Path (8N1 Mode) 8-B it Data M ode RX S tart D0 D1 D2 D3 D4 D5 D6 D7 S top tR TS t R TH RTS UART Timing for Modem Transmit Path (9N1 Mode with 9th Bit Escape) 9-B it Data M ode TX S tart D0 D1 D2 D3 D4 D5 D6 D7 ESC S top t R TS t CTH CTS Figure 2. Asynchronous UART Serial Interface Timing Diagram Rev. 0.9 9 Si2456/SI2433/Si2414 t CSS t CSH CS t AS t AH A0 ADDRESS = 0 or 1 t RL t RC RD t RLDD t DZ t DH D[7:0] VALID DATA t RLDD VALID DATA Figure 3. Parallel Interface Read Timing t CSS t CSH CS t AS t AH A0 ADDRESS = 0 or 1 tW L tW C WR t W DSU t DH D[7:0] VALID DATA VALID DATA Figure 4. Parallel Interface Write Timing 10 Rev. 0.9 Typical Application Circuit VCC C10 C37 Decoupling caps for U1 VD Refer to AN48 for Layout Guidelines Please submit layout to Silicon Labs for review prior to PCB fabrication. Q4 Q1 C27 C26 R5 R15 R8 R7 Y1 2 1 ESC/D3 DCDb/D4 SDO/D5 U1 1 2 3 4 5 6 7 8 9 10 11 12 CLKIN/XTALI XTALO CLKOUT/A0 FSYNC/D6 VD3.3 GND VDA RTS/D7 RXD/RD TXD/WR CTS/CS RESET SDO/D5 DCD/D4 ESC/D3 C1A ISOB VD 3.3 GND VDB SDI/D2 RI/D1 INT/D0 AOUT/INT 24 23 22 21 20 19 18 17 16 15 14 13 C36 C3 R27 C1 R28 C13 C12 + R24 U2 1 2 3 4 5 6 7 8 TSTA/QE2 TX/FILT2 TSTB/DCT NC/FILT IGND RX C1B REXT RNG1 DCT/REXT2 RNG2 NC/REF QB NC/VREG2 QE VREG Si3015 C6 D4 C30 Z5 C14 + R13 C16 16 15 14 13 12 11 10 9 Q2 + CLKOUT/A0 FSYNCb/D6 C5 R18 R6 R19 R17 R16 RTSb/AD7 RXD/RDb TXD/WRb CTSb/CSb RESETb C35 R11 R12 R2 C22 Z1 C20 Z4 D3 Si2456/33/14 AOUT/INTb INTb/D0 RIb/D1 SDI/D2 Q3 C4 C9 Rev. 0.9 11 C8 R10 L2 FB2 RING C39 C19 D2 R26 R32 RV2 C38 C18 C7 R9 D1 R25 RV1 Si2456/SI2433/Si2414 R31 TIP L1 FB1 C25 C24 Note 1: R12, R13 and C14 are only required if complex AC termination is used (ACT bit = 1). Note 2: See "Ringer Impedance" section for optional Czech Republic support. Note 3: See "Billing Tone Immunity" section for optional billing tone filter (Germany, Switzerland, South Africa). Note 4: See Appendix for applications requiring UL 1950 3rd edition compliance. Note 5: R27, R28, D3, D4, Z4, Z5, RV2 may be populated for enhanced lightning option. Note 6: L1,L2, C38, C39, R31, R32 are for EN55022/CISPR-22 Conducted Disturbance compliance. Si2456/SI2433/Si2414 Bill of Materials: Si2456/33/14 Chipset Component C1,C41 C3,C13,C35,C36 C5 2 Value 150 pF, 3 kV, X7R, 20% 0.22 F, 16 V, X7R, 20% 0.1 F, 50 V, Elec/Tant, 20% 0.1 F, 16 V, X7R, 20% 560 pF, 250 V, X7R, 20% 22 nF, 250 V, X7R, 20% 1.0 F, 16 V, Tant, 20% 0.68 F, 16 V, X7R/Elec/Tant, 20% 3.9 nF, 16 V, X7R, 20% 0.01 F, 16 V, X7R, 20% 1800 pF, 50 V, X7R, 20% Supplier(s) Novacap, Venkel, Johanson, Murata, Panasonic Novacap, Venkel, Johanson, Murata, Panasonic Venkel, Johanson, Murata, Panasonic Novacap, Venkel, Johanson, Murata Novacap, Venkel, Johanson, Murata, Panasonic Novacap, Venkel, Johanson, Murata, Panasonic Venkel, Panasonic Novacap, Venkel, AUX, Murata, Panasonic Novacap, Venkel, Johanson, Murata Novacap, Venkel, Johanson, Murata Not installed Novacap, Venkel, Johanson, Murata, Panasonic Novacap, Venkel, Johanson, Murata Not Installed Venkel Central Semiconductor Diodes Inc., OnSemiconductor, Fairchild Murata Murata, Panasonic OnSemiconductor, Fairchild, Zetex OnSemiconductor, Fairchild, Zetex C6,C10,C16,C37 C7,C8 C9 C12 C14 2 3 C18,C193 C20 C22 4 1 C24,C25 C30 4 1000 pF, 3 kV, X7R, 10% 33 pF, 16 V, NPO, 5% 10 pF, 16 V, NPO, 10% 47 pF, 16 V, X7R, 10% Dual Diode, 300 V, 225 mA BAV99 Dual Diode, 70 V, 350 mW Ferrite Bead, 600 , 25%, 200 mA 68 H, 120 mA, 4 max, 10% A42, NPN, 300 V A92, PNP, 300 V C26,C27 C38,C39 D3,D4 2,5 D1,D26 1 FB1,FB2 L1,L22,5 Q1,Q3 Q2 Notes: 1. The Si2456/33/14 design survives up to 3500 V longitudinal surges without R27, R28, D3, D4, Z4, and Z5. Adding the R27, R28, D3, D4, Z4, and Z5 enhanced lightning options increases longitudinal surge survival to greater than 6600 V. The isolation capacitors, C1, C4, C24, and C25, must also be rated to greater than the surge voltage. Y-class capacitors are recommended for highest surge survival. 2. For FCC-only designs, C14, C38, C39, R12, R13, R31, and R32 are not required (leave Si3015 pin 12 unconnected); L1 and L2 may be replaced with a short; R2 may be 5%; with Z1 rated at 18 V, C5 may be rated at 16 V; also see Note 9. 3. If the auto answer, ring detect, and caller ID features are not used, R9, R10, C7, C8, C18, and C19 may be removed. In this case, connect the RNG1 and RNG2 pins of the Si3015 to the IGND pin. 4. C22 and C30 may provide an additional improvement in emissions/immunity, depending on design and layout. Population option recommended. See "Emissions/Immunity" on page 67. 5. Compliance with EN55022 and/or CISPR-22 conductance disturbance tests requires the following: L1, L2, C38, C39, R31, and R32; D1 and D2 must be 400 V rated; and RV2 must be populated. See also "EN55022 and CISPR-22 Compliance" in "Appendix A--DAA Operation". 6. Several diode bridge configurations are acceptable (suppliers include General Semi., Diodes Inc.) 7. Q4 may require copper on board to meet 1/2 W power requirement. (Contact manufacturer for details.) 8. RV2 can be installed to improve performance for multiple longitudinal surges. 9. The R7, R8, R15, and R16, R17, R19 resistors may each be replaced with a single resistor of 1.78 k, 3/4 W, 1%. For FCC-only designs, 1.78 k, 1/16 W, 5% resistors may be used. 10. If the parallel phone detection feature is not used, R25 and R26 may be removed. 11. To ensure compliance with ITU specifications, frequency tolerance must be less than 100 ppm including initial accuracy, 5-year aging, 0 to 70 C, and capacitive loading. 12 Rev. 0.9 Si2456/SI2433/Si2414 Component Q47 RV1 RV2 R2 R5 R6 R7,R8,R15,R16,R17,R19 R9,R103 R11 R12 2 9 8 2 Value BCP56, NPN, 60 V, 1/2 W Sidactor, 275 V, 100 A 270 V, MOV 402 , 1/16 W, 1% 100 k, 1/16 W, 1% 120 k, 1/16 W, 5% 5.36 k, 1/4 W, 1% 56 k, 1/10 W, 5% 9.31 k, 1/16 W, 1% 78.7 , 1/16 W, 1% 215 , 1/16 W, 1% 2.2 k, 1/10 W, 5% 150 , 1/16 W, 5% 10 M, 1/16 W, 5% 10 , 1/10 W, 5% 470 , 1/16 W, 5% Si2456/33/14 Si3015 4.9152 MHz, 20 pF, 50 ppm, 150 ESR Zener Diode, 43 V, 1/2 W Supplier(s) OnSemiconductor, Fairchild Teccor, ST Microelectronics, Microsemi, TI Not Installed Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Silicon Labs Silicon Labs Not Installed Vishay, OnSemiconductor, Rohm Vishay, OnSemiconductor, Rohm R132 R18 R24 R25,R2610 R27,R28 R31,R32 U1 U2 Y1 11 1 2,5 Z12 Z4,Z5 Notes: 1 Zener Diode, 5.6 V, 1/2 W 1. The Si2456/33/14 design survives up to 3500 V longitudinal surges without R27, R28, D3, D4, Z4, and Z5. Adding the R27, R28, D3, D4, Z4, and Z5 enhanced lightning options increases longitudinal surge survival to greater than 6600 V. The isolation capacitors, C1, C4, C24, and C25, must also be rated to greater than the surge voltage. Y-class capacitors are recommended for highest surge survival. 2. For FCC-only designs, C14, C38, C39, R12, R13, R31, and R32 are not required (leave Si3015 pin 12 unconnected); L1 and L2 may be replaced with a short; R2 may be 5%; with Z1 rated at 18 V, C5 may be rated at 16 V; also see Note 9. 3. If the auto answer, ring detect, and caller ID features are not used, R9, R10, C7, C8, C18, and C19 may be removed. In this case, connect the RNG1 and RNG2 pins of the Si3015 to the IGND pin. 4. C22 and C30 may provide an additional improvement in emissions/immunity, depending on design and layout. Population option recommended. See "Emissions/Immunity" on page 67. 5. Compliance with EN55022 and/or CISPR-22 conductance disturbance tests requires the following: L1, L2, C38, C39, R31, and R32; D1 and D2 must be 400 V rated; and RV2 must be populated. See also "EN55022 and CISPR-22 Compliance" in "Appendix A--DAA Operation". 6. Several diode bridge configurations are acceptable (suppliers include General Semi., Diodes Inc.) 7. Q4 may require copper on board to meet 1/2 W power requirement. (Contact manufacturer for details.) 8. RV2 can be installed to improve performance for multiple longitudinal surges. 9. The R7, R8, R15, and R16, R17, R19 resistors may each be replaced with a single resistor of 1.78 k, 3/4 W, 1%. For FCC-only designs, 1.78 k, 1/16 W, 5% resistors may be used. 10. If the parallel phone detection feature is not used, R25 and R26 may be removed. 11. To ensure compliance with ITU specifications, frequency tolerance must be less than 100 ppm including initial accuracy, 5-year aging, 0 to 70 C, and capacitive loading. Rev. 0.9 13 Si2456/SI2433/Si2414 Analog Output Figure 5 illustrates an optional application circuit to support the analog output capability of the Si2456/33/14 for call progress monitoring purposes. +5 V C2 AOU T R3 6 + - 4 5 U1 C5 C3 Speaker R2 C4 + 3 2 C6 R1 Figure 5. Optional Connection to AOUT for a Monitoring Speaker Table 7. Component Values--Optional Connection to AOUT Symbol C2, C3, C5 C4 C6 R1 R2 R3 U1 Value 0.1 F, 16 V, 20% 100 F, 16 V, Elec. 20% 820 pF, 16 V, 20% 10 k, 1/10 W, 5% 10 , 1/10 W, 5% 47 k, 1/10 W, 5% LM386 14 Rev. 0.9 Si2456/SI2433/Si2414 Table 8. Protocol Characteristics Item Data Rate 56 kbps1 54.666 kbps1 53.333 kbps1 52 kbps1 50.666 kbps1 49.333 kbps1 48 kbps1 46.666 kbps1 45.333 kbps1 44 kbps1 42.666 kbps1 41.333 kbps1 40 kbps1 38.666 kbps1 37.333 kbps1 36 kbps1 34.666 kbps1 33.333 kbps1 32 kbps1 30.666 kbps1 29.333 kbps1 28 kbps1 33.6 kbps2 31.2 kbps2 28.8 kbps2 26.4 kbps2 24.0 kbps2 21.6 kbps2 19.2 kbps2 16.8 kbps2 14.4 kbps 12.0 kbps 9600 bps 7200 bps 4800 bps 2400 bps 1200 bps 300 bps 300 bps Notes: 1. Supported on Si2456 only. 2. Supported on Si2456 and SI2433 only. Specification ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.901 ITU-T V.342 ITU-T V.342 ITU-T V.342 ITU-T V.342 ITU-T V.342 ITU-T V.342 ITU-T V.342 ITU-T V.342 ITU-T V.34 or V.32bis ITU-T V.34 or V.32bis ITU-T V.34 or V.32bis ITU-T V.34 or V.32bis ITU-T V.34 or V.32bis ITU-T V.34, V.32 bis, or V.22bis ITU-T V.22bis, V.23, or Bell 212A ITU-T V.21 Bell 103 Rev. 0.9 15 Si2456/SI2433/Si2414 Table 8. Protocol Characteristics (Continued) Item Data Format Bit asynchronous Compatibility Operating Mode Switched network Data Modulation 28 to 56 kbps1 2.4 to 33.6 kbps2 14.4 kbps 12.0 kbps 9600 kbps 9600 kbps 7200 kbps 4800 kbps 2400 kbps 1200 kbps 0 to 300 kbps Answer Tone ITU-T V.32bis, V.32, V.22bis, V.22, and V.21 modes Bell 212A and 103 modes Transmit Carrier V.901 V.342 ITU-T V.32bis ITU-T V.32 ITU-T V.22, V.22bis/Bell 212A Originate mode Answer mode ITU-T V.21 Originate mode Answer mode Bell 103 Originate mode Answer mode Output Level Permissive--Switched network Notes: 1. Supported on Si2456 only. 2. Supported on Si2456 and SI2433 only. Specification Selectable 8, 9, 10, or 11 bits per character ITU-T V.901, V.341, V.32bis, V.32, V.23, V.22bis, V.22, V.21, Bell 212A, and Bell 103 Two-wire full duplex V.90 as specified by ITU-T V.34 as specified by ITU-T 128-level TCM/2400 Baud 0.01% 64-level TCM/2400 Baud 0.01% 32-level TCM/2400 Baud 0.01% 16-level QAM/2400 Baud 0.01% 16-level TCM/2400 Baud 0.01% 4-level QAM/2400 Baud 0.01% 16-level QAM/600 Baud 0.01% 4-level PSK/600 Baud 0.01% FSK 0-300 Baud 0.01% 2100 Hz 3 Hz 2225 Hz 3 Hz As specified by ITU-T As specified by ITU-T 1800 Hz 0.01% 1800 Hz 0.01% 1200 Hz 0.5 Hz 2400 Hz 1 Hz Mark (980 Hz 12 Hz) Space (1180 Hz 12 Hz) Mark (1650 Hz 12 Hz) Space (1850 Hz 12 Hz) Mark (1270 Hz 12 Hz) Space (1070 Hz 12 Hz) Mark (2225 Hz 12 Hz) Space (2025 Hz 12 Hz) -9 dBm maximum 16 Rev. 0.9 Si2456/SI2433/Si2414 Table 8. Protocol Characteristics (Continued) Item Receive Carrier ITU-T V.901 ITU-T V.342 ITU-T V.32bis ITU-T V.32 ITU-T V.22, V.22bis/Bell 212A Originate mode Answer mode ITU-T V.21 Originate mode Answer mode Bell 103 Originate mode Answer mode Carrier Detect (level for ITU-T V.22bis, V.22, V.21, 212, 103) in Switched Network Hysteresis Specification As specified by ITU-T As specified by ITU-T 1800 Hz 7 Hz 1800 Hz 7 Hz 2400 Hz 7 Hz 1200 Hz 7 Hz Mark (980 Hz 12 Hz) Space (1180 Hz 12 Hz) Mark (1650 Hz 12 Hz) Space (1850 Hz 12 Hz) Mark (2225 Hz 12 Hz) Space (2025 Hz 12 Hz) Mark (1270 Hz 12 Hz) Space (1070 Hz 12 Hz) Acquisition (-43 dBm) Release (-48 dBm) 2 dBm minimum Note: ITU-T V.901, V.342, V.32/V.32bis are echo canceling protocols that use signal quality as criteria for maintaining connection. They also provide for self-training detection to force disconnect. DTE Interface Line Equalization Connection Options Phone Types Dialing DTMF Output Level Pulse Dial Ratio Ring Cadence Call Progress Monitor EIA/TIA-232-E (ITU-T V.24/V.28/ISO 2110) Automatic Adaptive Loss of Carrier in ITU-T V.22bis and lower 500 (rotary dial), 2500 (DTMF dial) Pulse and Tone Per Part 68 Make/Break: 39/61% On 2 seconds; Off 4 seconds BUSY CONNECT (rate) NO ANSWER NO CARRIER NO DIALTONE OK RING RINGING Notes: 1. Supported on Si2456 only. 2. Supported on Si2456 and SI2433 only. Rev. 0.9 17 Si2456/SI2433/Si2414 Functional Description The Si2456/33/14 ISOmodemTM is a complete embedded modem chipset with integrated direct access arrangement (DAA) that provides a programmable line interface to meet global telephone line requirements. Available in two small packages, this solution includes a DSP data pump, a modem controller, on-chip RAM and ROM, an analog front end (AFE), a DAA, and an analog output. The Si2456/33/14 accepts standard modem AT commands and provides connect rates up to 56/33.6/ 14.4 kbps full-duplex over the Public Switched Telephone Network (PSTN). The Si2456/33/14 features a complete set of modem protocols, including all ITU-T standard formats up to 56 kbps. The ISOmodem provides numerous additional features for embedded modem applications. The modem includes full caller ID detection and decoding for global standards. Call progress is supported through echoing result codes and is also programmable to meet global settings. Because the Si2456/33/14 ISOmodem integrates the DAA, analog features, such as parallel phone detect, overcurrent detection, and global PTT compliance with a single design, are included. This device is ideal for embedded modem applications due to its small board space, low power consumption, and global compliance. The Si2456/33/14 solution includes a silicon DAA using Silicon Laboratories' proprietary ISOcapTM technology. This highly-integrated DAA can be programmed to meet worldwide PTT specifications for ac termination, dc termination, ringer impedance, and ringer threshold. In addition, the Si2456/ 33/14 has been designed to meet the most stringent worldwide requirements for out-of-band energy, billingtone immunity, lightning surges, and safety requirements. The Si2456/33/14 is designed to be rapidly incorporated into existing modem applications. The device interfaces directly through either a serial UART to a microcontroller or through a standard RS-232 transceiver. This interface allows for PC evaluation of the modem immediately upon powerup via the AT commands using standard terminal software. The Si2456/33/14 also provides an 8-bit parallel port. The Si2456/33/14 solution requires only a few low-cost discrete components to achieve global compliance. See the "Typical Application Circuit" on page 11. Table 8 on page 15 outlines the functional modes of the Si2456/33/ 14 modem. For additional information, see the Si2456/ 33/14 Programmer's Guide. Digital Interface The Si2456/33/14 digital I/O can be configured as either a serial UART interface with flow control or as a parallel 8-bit interface. Selection of a serial or parallel I/O interface is determined by the state of AOUT/INT (Si2456/33/14, pin 13) during the rising edge of RESET. An internal pullup resistor forces the default state to serial mode operation. An external 10 k pulldown resistor can be connected to AOUT/INT to force selection of parallel mode. Additionally, when selecting parallel mode, CS should remain high until after the rising edge of RESET. Configuration of pins 3, 4, 8-11, 13-16, and 22-24 is determined by this interface selection. Serial Interface This section describes the basic operation of the Si2456/33/14 serial UART interface. The Si2456/33/14 supports DTE rates up to 307.2 kbps with the standard serial UART format. Upon powerup, the UART defaults to a 19.2 kbps baud rate. If a pulldown resistor 10 k is placed between D2 (Si2456/33/14, pin 16) and GND (Si2456/33/14, pin 6), the DTE rate is 2400 bps 8N1 after reset. This rate may be changed through the extended AT\Tn commands listed in Table 14 on page 30. Immediately after the AT\Tn command is sent, the host must program its UART to the new baud rate. The UART interface synchronizes on the start bits of incoming characters and samples the data bit field and stop bits. The interface is designed to accommodate character lengths of 8, 9, 10, and 11 bits giving data fields of 6, 7, 8, or 9 bits. The Si2456/33/14 defaults to a character length of 8 (8N1), and the character length can be set via the \Bn command. Under some \Bn options, parity may be set using the \Pn command. The serial interface provides a hardware pin, DCD (data carrier detect), which remains low as long as the ISOmodem is connected. This and other signals can also be monitored via the I/O Control 0 register (U70). The INT interrupt pin can be programmed to alert the host of changes in DCD and the other interrupts listed in I/O Control 0 (U70). After an interrupt has been received by the host via the INT pin, the host should issue the AT:I command. This command causes a read-clear of the CID, OCD, PPD, and RI bits of the U70 register and raises (deactivates) the INT pin. 18 Rev. 0.9 Si2456/SI2433/Si2414 Parallel Interface The parallel interface is an 8-bit data bus with a single bit address. Figure 3 on page 10 shows the required timing for the parallel interface. If A0 = 0, the data bus represents a read/write to the "Parallel Interface 0 (0x00)" register on page 65. If A0 = 1, the data bus represents a read/write to the "Parallel Interface 1 (0x01)" register on page 66). The parallel port may be read/written by the host in blocks by monitoring the receive/transmit FIFOs on the Si2456/33/14. The transmit and receive FIFOs are 14 and 12 characters deep, respectively. The FIFOs can be guaranteed to never fill/empty as long as TXE and RXF are polled (and the TX/RX register is written/read appropriately). The FIFOs can also be serviced on interrupts by using the INT pin and setting the INTM bit 3 in the "Parallel Interface 1 (0x01)" register. Additionally, the CTS and the RTS bits are used to control flow. The INT pin in parallel mode operates differently than in serial mode. In parallel mode, the pin is used primarily to monitor and control the I/O FIFO. By default, the INT function is triggered by a low-to-high transition on RXF, TXE, or INT in the Parallel Interface 1 register. The INT bit in the "Parallel Interface 1 (0x01)" register is set by the events selected in U70. If the INTM bit is set, these events cause a high-to-low transition on the INT pin. Contact Silicon Labs Technical Support for detailed parallel interface applications information. "ESC pin"--This feature is enabled by setting U70[15] (HES) = 1b. A high level detected on this pin returns the modem to Command mode. In parallel mode, the ESC pin is replaced functionally by the ESC bit in the Parallel Interface 1 register. The ESC pin is level-sensitive and should be left high until the "OK/" result code indicates that the modem is in Command mode. "9th bit"--If 8-bit data format with escape is programmed, a 1 detected on bit 9 returns the modem to Command mode. (See Figure 2 on page 9.) This is enabled via the \B6 AT command. The "ATO" command can be used to re-enter Data mode no matter which "escape" method is used. Flow Control Flow control settings are configured with the "AT\Q" commands. Possible settings are no flow control, CTSonly flow control, RTS/CTS flow control, and XON/ XOFF. RTS is the flow control signal from the host. When RTS is low, RXD serial transmission operates normally. When RTS goes high, no more characters are transmitted after the current character, and RXD is clamped to mark (1). This state persists until RTS goes low. Normal serial transmission resumes within one character-time. The CTS output pin controls flow from the Si2456/33/14 to the host. When CTS is low, the Si2456/33/14 is ready to accept a character. While CTS is high, no data should be sent to the Si2456/33/14 on TXD. Figure 2 on page 9 shows the timing for flow control and the serial interface. The ISOmodem default setting configures it to automatically retrain to a lower line rate depending on line conditions. However, the UART speed remains fixed as set by the "AT\Tn" command. Command Mode Upon reset, the ISOmodem is in Command mode and accepts "AT" commands. An outgoing modem call can be made using the "ATDT#" (tone dial) or "ATDP#" (pulse dial) command after the device is configured. If the handshake is successful, the modem responds with the response codes detailed in Table 16 on page 33. The Si2456/33/14 does not enter Data mode until after the protocol result code. In Data mode, "AT" commands are not accepted. The Si2456/33/14 reverts to Command mode if the modem connection is terminated. However, there are three "escape" methods that may be used to return the ISOmodem to Command mode from Data mode. See I/O Control 0 (U70). "+++"--The escape sequence is a sequence of three escape characters that are set in S-register S2 ("+" characters by default). If the ISOmodem detects the "+++" sequence and detects no activity on the UART before or after the "+++" sequence for a time period set by S-register S12, it returns to Command mode. This is enabled by setting U70[13] (TES) = 1b (default). Data Mode The Si2456/33/14 ISOmodem is in Data mode while it has a telephone line connection to another modem or is in the process of establishing a connection. In Command and Data mode, the Si2456/33/14 operates in asynchronous mode only. Data protocols are available to provide error correction to improve reliability (V.42 and MNP2-4) and data compression to increase throughput (V.42bis and MNP5). Each connection between two modems in Data mode begins with a handshaking sequence. During that sequence, the modems determine the line speed, data protocol, and related parameters for the data link. Configuration through AT commands determines the range of choices available to the modem in the negotiation process. Most configuration options in the Si2456/33/14 act to limit the range over which a Rev. 0.9 19 Si2456/SI2433/Si2414 parameter can be negotiated rather than making specific assignments. The host can cause the Si2456/33/14 to enter Data mode and initiate dialing by issuing an AT command to dial. transmit buffer, the Si2456/33/14 begins an HDLC frame at the DCE. The reason for this 10-character "headstart" is to reduce the likelihood of an underrun once the HDLC frame has begun at the DCE. As long as the host continues to send data, the Si2456/33/14 continues to zero insert, update the CRC value, and send data within an HDLC frame. To properly end the frame, the host must send a /Zn (see Table 10) indicating to the Si2456/33/14 the end of the frame. Once the Si2456/33/14 encounters the /Zn, it computes and sends the final CRC and begins transmitting HDLC flags. If an HDLC frame is smaller than the 10-character "head start", the HDLC frame is started at the DCE upon receipt of the /Zn character. The /Tn metacharacter is sent to the host to provide an indication that an HDLC frame was sent successfully. The "n" in the /Zn and /Tn is a host-defined tag that can be used to track multiple HDLC frames. To facilitate transmit flow control, the modem sends the /S and /Q metacharacters to the host. If the transmit buffer (512 bytes) is three-quarters full, the /S metacharacter is sent to the host. The host must then stop transmitting. When the transmit buffer empties down to half full, the /Q metacharacter is sent to the host to indicate that it is okay to begin transmitting again. If a transmit underrun occurs, the current frame is aborted, and a /Un is sent to the host. All data from the underrun to the receipt of the /Zn metacharacter is discarded by the modem. A design goal of the host software should be to eliminate any occurrence of the /Un metacharacter. Because the "/" is an escape character, the host must send a "//" when a "/" appears in the transmit data stream. The Si2456/33/14 removes one "/" for each instance of "// " that appears on TXD. On the receive side, as long as HDLC flags are received by the Si2456/33/14 at the DCE, it does not pass data out RXD. Once the first non-flag word is detected, the Si2456/33/14 performs zero deletion, calculates the CRC value, and passes the data out RXD. The Si2456/33/14 continues in this manner until detecting the HDLC flags, which indicate the end of the frame. At this point, the HDLC frame is complete, and the Si2456/33/14 calculates the final CRC and compares it to the CRC value received in the frame. If the CRC matches, the Si2456/33/14 passes /G to the host. If the CRC does not match, the Si2456/33/14 passes /B to the host. Because the / is an escape character, the Si2456/33/14 sends a // when a / appears in the receive data stream. The host must remove one / for each instance of // that appears on RXD. Table 10 on page 21 lists additional escape characters that are used to control the flow of data between the Si2456/33/14 and the host in the "transparent HDLC" mode. Fast Connect The Si2456/33/14 supports a Fast Connect mode of operation to reduce the time of a connect sequence in originate mode. The Fast Connect modes are enabled via U7A. Each of the stages (answer tone detect time, unscrambled ones detect time, etc.) in the connect sequence may be shortened. The amount that each of these is shortened when in Fast Connect mode depends on the modulation. (See Table 9.) Transparent HDLC/ Synchronous DCE Mode The Si2456/33/14 also supports a "transparent HDLC" mode of operation, which operates with an asynchronous DTE and a synchronous DCE. The Si2456/33/14 performs HDLC frame packing and unpacking, frame opening and closing, flag generation and detection, CRC computation and checking, and 0 insertion and deletion. To use this mode, the DTE rate must be greater than the DCE rate, and either CTS or /Q and /S must be used. (See Table 10 on page 21.) Table 9. Fast Connect/Transparent HDLC Protocol All V.22, Bell212, V.22bis Bell103, V.21 DCE Normal, Asynchronous Normal, Transparent HDLC Fast connect, Asynchronous Fast connect, Asynchronous Fast connect, Transparent HDLC Transparent HDLC Register Settings &Hn &H6, 7, 8 U7A = 0002 \N0 &H9, 10 U7A = 0001 \N0 &H7, 8 U7A = 0001 \N0 &H7, 8 U7A = 0003 \N0 &H6 U7A = 0002 \N0 V.22, Bell212 V.22, Bell212 V.22bis On the transmit side, if no data is received on TXD, the Si2456/33/14 continually transmits HDLC flags at the DCE. As soon as there are 10 characters sent into the 20 Rev. 0.9 Si2456/SI2433/Si2414 Table 10. Synchronous DCE Mode Metacharacters Character /Zn Direction TX Description Follows the last character of a transmit frame. Once the frame has been sent, a /T , metacharacter is sent to the host. n denotes a frame tag. n is echoed back later with the /U or /T metacharacters to make frame tracking easier. A forward slash character is to be transmitted. Escape back to Command mode. Si2456/33/14 returns to Command mode. A transmit underrun has occurred, but a /Z metacharacter was not received. When an underrun occurs, the current frame is aborted, and a /Un is sent to host where n is the frame tag. All data following the underrun, up to the /Z metacharacter, is discarded by the modem. The transmit frame n has been sent. The n from the /Z is echoed with the /Tn to allow tracking frames. The previous receive frame CRC check was successful. The previous receive frame CRC check was unsuccessful. Transmit buffer is almost full, and the host must pause transmission to prevent an overflow. If hardware flow control is used, the host may ignore this metacharacter. The host may begin transmitting again after a /S (pause) has been sent. If hardware flow control is used, the host may ignore this metacharacter. A forward slash character was received. Received frame was aborted. // /E /Un TX TX RX /Tn /G /B /S /Q // /A RX RX RX RX RX RX RX Rev. 0.9 21 Si2456/SI2433/Si2414 Clocking/Low Power Modes The Si2456/33/14 contains an on-chip phase-locked loop (PLL) and clock generation. Using either a single crystal or master clock input, the Si2456/33/14 can generate all the internal clocks required to support the featured modem protocols. Either a 4.9152 MHz clock (3.3 V max input--see Table 5 on page 8) on XTALI or a 4.9152 MHz (100 ppm max) crystal across XTALI and XTALO form the master clock for the ISOmodem. This clock source is sent to an internal PLL that generates all necessary internal system clocks including the DSP clock. Figure 6 shows a block diagram of how the DSP clock and the CLKOUT are derived. The DSP clock is generated from the 78.6432 MHz clock via the N1 clock divider. N1 is programmed through U6E[1:0] (N1) and defaults to 2 giving a DSP clock rate of 39.3216 MHz. This DSP clock rate is necessary to run the Si2456/33/14 in all modes described in the data sheet. Using the S24 S-register, the Si2456/33/14 can be set to automatically enter sleep mode after a preprogrammed time of inactivity with either the DTE or the remote modem. The sleep mode is entered after (S24) seconds have passed since the TX FIFO has been empty. The ISOmodem remains in the sleep state until either a 1 to 0 transition on TXD (serial mode) or a 1 to 0 transition on CS (parallel mode) occurs. Additionally, the Si2456/33/14 may be placed in a complete powerdown mode or wake-on-ring mode. Complete powerdown is accomplished via U65[13] (PDN). Once the PDN bit is written, the Si2456/ 33/14 completely powers down and can only be powered back on via the RESET pin. A 78.6432 MHz/(R1 + 1) clock is produced on the CLKOUT pin that may be used as an external system clock. R1 may be programmed via U5E to any value between 1 and 31 (default value = 31). SDSP /8 / N1 N1 = 2, 2.5, 3, 4 78.6432 MHz PLL 1 DSP Clock 0 / (R1 + 1) 1 < R1 < 31 CLKOUT Figure 6. DSP Clock Divider and CLKOUT Generation 22 Rev. 0.9 Si2456/SI2433/Si2414 AT Commands At powerup, the Si2456/33/14 is in the AT Command mode. In Command mode, the modem monitors the input (serial or parallel) checking constantly for a valid command (AT commands are described in Table 11). Command Syntax with a carriage return. The letters AT stand for "ATtention" and signal the modem that a command (or commands) follows. It is possible to enter multiple commands on a single line (up to a maximum of 48 characters). The commands may be separated by space or line-feed characters to improve readability. The modem ignores space and line-feed characters; so, they are not counted as part of the line's 48 characters. A carriagereturn character must be entered at the end of a command line to signal the modem to process the commands. Command Buffer An AT command takes the form of a single letter or combination of a letter and a modified character, often followed by one or more numeric characters. The modem interprets the AT command as a direction to set a parameter or perform an action. The command (letter or letter and modifier) identifies the parameter or action, and the numeric value specifies (from a pre-determined range of choices) how the parameter is to be set or how the action is to be performed. Issuing any AT command strings that are not listed in Table 11 may result in unpredictable behavior. AT commands are issued to the modem in the form of a "command line." Each command line is preceded by the letters AT, contains one or more commands, and ends Once the command line is issued to the modem, it is loaded into an internal command buffer with a capacity of 48 characters. The AT prefix, spaces, line-feed characters, and carriage return are not loaded into the buffer. If a command line is more than 48 characters long, the modem does not act on any characters. Table 11. Basic AT Command Set (Command Defaults in Bold) Command Action $ A A/ Dn Display AT Command mode settings. Answer incoming call Re-execute last command. This is the only command not preceded by "AT" or followed by a Modifier Function ! or & , or < ; P T W Flash hook switch for FHT (U4F) ms (default: 500 ms) Pause before continuing for S8 seconds (default: 2 seconds) Return to AT Command mode Pulse (rotary) dialing--pulse digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 Tone (DTMF) dialing--DTMF digits: *, #, A, B, C, D, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 Wait for dial tone before continuing for S14 seconds (default: 12 seconds). Blind dialing modes X0, X1 and X3 do not affect the W command. If the DOP bit (U7A, bit 7) is set, the "ATDTW" command will cause the ISOmodem to pause dialing and either report an "OK" if a dialtone is detected or "NO DIALTONE" if a dial tone is not detected. En E0 Local DTE echo Disable Rev. 0.9 23 Si2456/SI2433/Si2414 Table 11. Basic AT Command Set (Command Defaults in Bold) (Continued) Command E1 Enable Action Hn H0 H1 In I0 Hook switch. Go on-hook (hang up modem). Go off-hook. Identification and checksum. Display Si2456/33/14 revision code. B: Revision B C: Revision C, etc. Display Si2456/33/14 firmware revision code (numeric). Display line-side revision code. 15D = Si3015 revision D Display the ISOmodem model number. "2414" = Si2414 "2433" = SI2433 "2456" = Si2456 Diagnostic Results 1. Format RX Speaker is always off. Description Receive/transmit data rate in bps Error correction/data compression protocol. Number of V.42 receive errors Number of V.42 transmit errors Number of retrains Disconnect reason code (see Table 15 on page 32) Description Receive level power in dBm Transmit level power in dBm. Effective signal-to-noise ratio in dB Ratio of residual echo to signal in dB I1 I3 I6 I7 I8 Mn M0 M1 M2 M3 On O0 O1 O2 Qn Q0 Speaker is on while dialing and handshaking; off in Data mode. Speaker is always on. Speaker is off while dialing, on during handshaking and retraining. Return to Data mode from Command mode operation. Return to Data mode. Return to Data mode and perform a full retrain (at any speed except 300 bps). Return to Data mode and perform rate renegotiation. Response mode. Enable result codes (see Table 16 on page 33) Q1 R Disable result codes (enable quiet mode). Initiate V.23 reversal. 24 Rev. 0.9 Si2456/SI2433/Si2414 Table 11. Basic AT Command Set (Command Defaults in Bold) (Continued) Command Action Sn S$ Sn? Sn=x Vn V0 V1 S-register operation (see Table 20 on page 40). List contents of all S registers. Display contents of S-register n. Set S-register n to value x (where n and x are decimal values). Result code type (see Table 16 on page 33). Numeric result codes. Verbal result codes Xn X0 X1 X2 X3 X4 Call Progress Monitor (CPM)--This command controls which CPM signals are monitored and reported to the host from the Si2456/33/14. (See Table 16 on page 33.) Basic results; disable CPM--Blind dial (does not wait for dial tone). CONNECT message does not include speed. Extended results; disable CPM--Blind dial. CONNECT message includes speed. Extended results and detect dial tone only--Add dial tone detection to X1 mode. Does not blind dial. Extended results and detect busy only--Add busy tone detection to X1 mode. Extended results, full CPM--Full CPM enabled, CONNECT message includes speed. X5 Yn Y0 Extended results--Full CPM enabled including ringback detection. Adds ringback detection to X4 mode. Long space disconnect--Modem hangs up after 1.5 seconds or more of continuous space while online. Disable. Y1 Z :I Enable. Hard Reset--This command is functionally equivalent to pulsing the RESET pin low. (See tAT in Table 6 on page 8.) Interrupt Read--This command causes the ISOmodem to report the lower 8 bits of the interrupt register I/O Control 0 (U70). The CID, OCD, PPD, and RI bits also are cleared, and the INT pin (INT bit in parallel mode) is deactivated on this read. Program RAM Write--This command is used to upload firmware supplied by Silicon Labs to the Si2456/33/14. The format for this command is AT:Paaaa,xxxx,yyyy,.... where aaaa is the first address in hexadecimal and xxxx,yyyy,.... is data in hexadecimal. Only one :P command is allowed per AT command line. No other commands can be concatenated in the :P command line. This command is only for use with special files provided by Silicon Laboratories. Do not attempt to use this command for any other purpose. User-Access Register Read--This command allows the user to read from the user-access registers. (See pages 42-62.) The format is "AT:Raa", where aa = user-access address in hexadecimal. The "AT:R" command causes all the U- registers to be displayed. User-Access Register Write--This command allows the user to write to the 16-bit user-access registers. (See page 42.) The format is "AT:Uaa,xxxx,yyyy,zzzz,..." where aa = user-access address in hexadecimal. xxxx = data in hexadecimal to be written to location aa. yyyy = data in hexadecimal to be written to location (aa + 1). zzzz = data in hexadecimal to be written to location (aa + 2). etc. :P :R :U Rev. 0.9 25 Si2456/SI2433/Si2414 Table 11. Basic AT Command Set (Command Defaults in Bold) (Continued) Command Action +VCID = X Caller ID Enable. X Mode 0 Off 1 On--formatted 2 On--raw data format +VCDT = X Caller ID Type. X Mode 0 After ring only 1 Always on 2 UK 3 Japan 26 Rev. 0.9 Si2456/SI2433/Si2414 Extended AT Commands The extended AT commands are supported by the Si2456/33/14 and are described in Tables 12 through 14. Table 12. Extended AT& Command Set (Command Defaults in Bold) Command Action &$ &Gn Display AT& current settings. Line connection rate limit--This command sets a lower limit on the line speed that the Si2456/33/14 can connect. Note that the &Hn commands may limit the line speed as well (&Gn not used for &H0 or &H1). 4.8 kbps max 7.2 kbps max 9.6 kbps max 12 kbps max 14.4 kbps max (default for Si2414) &G5 &G6 &G7 &G8 &G9 &G10 &G11 &G12 &G13 &G14 &G15 &G16 &G17 16.8 kbps max 19.2 kbps max 21.6 kbps max 24 kbps max 26.4 kbps max 28.8 kbps max 31.2 kbps max 33.6 kbps max (default for Si2456 and SI2433) &Hn &H0 Switched network handshake mode--&Hn commands must be on a separate command line from ATD, ATA, or ATO commands. V.90 with automatic fallback (56 kbps to 300 bps) (default for Si2456) &H1 &H2 V.90 only (56 kbps to 28 kbps) V.34 with automatic fallback (33.6 kbps to 300 bps) (default for SI2433) &H3 &H4 V.34 only (33.6 kbps to 2400 bps) ITU-T V.32bis with automatic fallback (14.4 kbps to 300 bps) (default for Si2414) &H5 &H6 &H7 &H8 &H9 &H10 &H11 &Tn &T0 ITU-T V.32bis only (14.4 kbps to 4800 bps) ITU-T V.22bis only (2400 bps or 1200 bps) ITU-T V.22 only (1200 bps) Bell 212 only (1200 bps) Bell 103 only (300 bps) ITU-T V.21 only (300 bps) V.23 1200/75 bps Test Mode Cancel Test Mode (Escape to Command mode to issue AT&T0) Rev. 0.9 27 Si2456/SI2433/Si2414 Table 12. Extended AT& Command Set (Command Defaults in Bold) (Continued) Command Action &T2 Initiate ITU-T V.54 (ANALOOP) test. Modem mode set by &H AT command. Test loop is through the DSP (Si2456/33/14 device) only. ISOmodem echoes data from TX pin (Register 0 in parallel mode) back to RX pin (Register 0 in parallel mode). Initiate ITU-T V.54 (ANALOOP) test. Modem mode set by &H AT command. Test loop is through the DSP (Si2456/33/14), DAA interface section (Si2456/33/14), ISOcap interface (Si3015), and analog hybrid circuit (Si3015). ISOmodem echoes data from TX pin (Register 0 in parallel mode) back to RX pin (Register 0 in parallel mode). Phone line termination required as in Figure 1. To test only the ISOcap link operation, the hybrid and AFE codec can be removed from the test loop by setting the DL bit (U62, bit 1). Compute checksum for firmware-upgradeable section of program memory. If no firmware upgrade is installed, &T6 returns 0x0408. &T3 &T6 28 Rev. 0.9 Si2456/SI2433/Si2414 Table 13. Extended AT% Command Set (Command Defaults in Bold) Command Action %$ %Cn %C0 %C1 Display AT% command settings. Data compression Disable V.42bis and MNP5 data compression Enable V.42bis in transmit and receive paths. If MNP is selected (\N2), then %C1 enables MNP5 in transmit and receive paths. %C2 %C3 %On %O1 Enable V.42bis in transmit path only Enable V.42bis in receive path only Answer mode Si2456/33/14 will auto-answer a call in answer mode %O2 Si2456/33/14 will auto-answer a call in originate mode Rev. 0.9 29 Si2456/SI2433/Si2414 Table 14. Extended AT\ Command Set (Command Defaults in Bold) Command Action \$ \Bn \B0 \B1 \B2 \B3 Display AT\ command settings. Character length 6N1--six data bits, no parity, one stop bit, one start bit, eight bits total (\N0 only) 7N1--seven data bits, no parity, one stop bit, one start bit, nine bits total (\N0 only) 7P1--seven data bits, parity optioned by \P, one stop bit, one start bit, 10 bits total 8N1--eight data bits, no parity, one stop bit, one start bit, 10 bits total \B5 \B6 \Nn \N0 \N2 \N3 8P1--eight data bits, parity optioned by \P, one stop bit, one start bit, 11 bits total (\N0 only) 8X1--eight data bits, one escape bit, one stop bit, one start bit, 11 bits total (enables ninth-bit escape mode) Asynchronous protocol Wire mode (no error correction, no compression) MNP Reliable Mode. The Si2456/33/14 attempts to connect with MNP2-4 error correction. If unsuccessful, the call is dropped. V.42 auto-reliable--The Si2456/33/14 attempts to connect with data compression and error correction (V42bis and V.42). If unsuccessful, V.42 only is attempted. If unsuccessful, wire mode is attempted. \N4 \Pn \P0 V.42 (LAPM) reliable mode (or drop call)--Same as \N3 except that the Si2456/33/14 drops the call instead of connecting in wire mode. Parity type Even \P1 \P2 \P3 \Qn \Q0 \Q2 Space Odd Mark Modem-to-DTE flow control Disable all flow control--Note that this may only be used if the DTE speed and the VF speed are guaranteed to match throughout the call. Use CTS only \Q3 \Q4 \Tn \T0 Use RTS/CTS Use XON/XOFF flow control for modem-to-DTE interface. Does not enable modem-to-modem flow control. DTE speed 300 bps 30 Rev. 0.9 Si2456/SI2433/Si2414 Table 14. Extended AT\ Command Set (Command Defaults in Bold) (Continued) Command Action \T1 \T2 \T3* \T4 \T5 \T6 \T7 \T8 \T9 600 bps 1200 bps 2400 bps 4800 bps 7200 bps 9600 bps 12.0 kbps 14.4 kbps 19.2 kbps \T10 \T11 \T12 \T13 \T14 \T15 \U 38.4 kbps 57.6 kbps 115.2 kbps 230.4 kbps 245.760 kbps 307.200 kbps Serial mode--causes a low pulse (25 ms) on RI and DCD. INT to be the inverse of ESC. RTS to be inverse of CTS. Parallel mode--causes a low pulse (25 ms) on INT. This command terminates with a RESET. Connect message type Report connect message and protocol message \Vn \V0 \V2 Report connect message only (exclude protocol message) *Note: Default DTE speed when 10 k resistor is placed between SDI and GND. Rev. 0.9 31 Si2456/SI2433/Si2414 Table 15. Disconnect Codes Disconnect Code Reason 8002 8 8008 9 8009 A B D E 10 8014 8017 8018, 8019 1a 1b 801c 801e 801f 802a 802b 802c 2d Handshake stalled. No dialtone detected. No line available. No loop current detected. Parallel phone pickup disconnect. No ringback. Busy signal detected. V.42 requested disconnect. MNP requested disconnect. Drop dead timer disconnect. Loop current loss. Remote modem requested disconnect. Soft reset command received. V.42 Protocol error. MNP Protocol error. Loss-of-carrier disconnect. Long space disconnect. Character abort disconnect. Rate request failed. Answer modem energy not detected. V.8 negotiation failed. TX data timeout. 32 Rev. 0.9 Si2456/SI2433/Si2414 Table 16. Result Codes Numeric Meaning Verbal Response X0 X1 X2 X3 X4 X5 0 1 2 3 4 5 6 7 8 9 10 11 12 14 15 16 17 18 19 20 21 22 23 24 30 75 31 32 33 52 60 61 63 64 65 Command was successful OK X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X Link established at 300 bps CONNECT or higher Incoming ring detected Link dropped Command failed Link establish at 1200 Dial tone not present Line busy Remote not answering Ringback detected Link established at 2400 Link established at 4800 Link established at 9600 Link established at 19200 Link established at 7200 Link established at 12000 Link established at 14400 Link established at 16800 Link established at 21600 Link established at 24000 Link established at 26400 Link established at 28800 Link established at 31200 Link established at 33600 Caller ID mark detected Link established at 75 Hookswitch flash detected UK CID State Tone Alert Signal detected Overcurrent condition Link established at 56000 Link established at 32000 Link established at 48000 Link established at 28000 Link established at 29333 Link established at 30666 RING NO CARRIER ERROR CONNECT 1200 NO DIALTONE BUSY NO ANSWER RINGING CONNECT 2400 CONNECT 4800 CONNECT 9600 CONNECT 19200 CONNECT 7200 CONNECT 12000 CONNECT 14400 CONNECT 16800 CONNECT 24000 CONNECT 26400 CONNECT 28800 CONNECT 33600 CIDM CONNECT 75 FLASH STAS X2 CONNECT 56000 3 1 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X CONNECT 216001 1 1 1 CONNECT 312001 1 X X X X X X X X X X X X X X X CONNECT 320003 CONNECT 48000 CONNECT 28000 CONNECT 29333 3 3 3 CONNECT 306663 Notes: 1. This message is only supported on the Si2456 and SI2433. 2. X is the only verbal response code that does not follow the Rev. 0.9 33 Si2456/SI2433/Si2414 Table 16. Result Codes (Continued) Numeric Meaning Verbal Response X0 X1 X2 X3 X4 X5 66 67 68 69 70 77 79 80 81 82 83 90 91 92 93 94 95 96 97 98 99 100 101 102 Link established at 33333 Link established at 34666 Link established at 36000 Link established at 37333 No protocol V.42 protocol V.42bis protocol MNP2 protocol MNP3 protocol MNP4 protocol MNP5 protocol Link established at 38666 Link established at 40000 Link established at 41333 Link established at 42666 Link established at 44000 Link established at 45333 Link established at 46666 Link established at 49333 Link established at 50666 Link established at 52000 Link established at 53333 Link established at 54666 DTMF dial attempted on a pulse dial only line CONNECT 33333 3 3 3 X X X X X X X X X X X X X X X X X X X X CONNECT 34666 CONNECT 36000 CONNECT 373333 PROTOCOL: NONE PROTOCOL: V42 PROTOCOL: V42bis PROTOCOL: ALTERNATE, + CLASS 2 PROTOCOL: ALTERNATE, + CLASS 3 PROTOCOL: ALTERNATE, + CLASS 4 PROTOCOL: ALTERNATE, + CLASS 5 CONNECT 386663 CONNECT 40000 CONNECT 41333 CONNECT 42666 CONNECT 45333 CONNECT 46666 CONNECT 49333 CONNECT 52000 CONNECT 53333 CONNECT 54666 3 3 3 Set with \V0 command. Set with \V0 command. Set with \V0 command. Set with \V command. Set with \V command. Set with \V command. X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X CONNECT 440003 3 3 3 CONNECT 506663 3 3 3 UN-OBTAINABLE NUMBER Notes: 1. This message is only supported on the Si2456 and SI2433. 2. X is the only verbal response code that does not follow the The connect messages shown in Tables 14 and 16 are sent when link negotiation is complete. 34 Rev. 0.9 Si2456/SI2433/Si2414 Data Compression The modem can achieve DTE (host-to-ISOmodem) speeds greater than the maximum DCE (modem-tomodem) speed through the use of a data compression protocol. The compression protocols available are the ITU-T V.42bis and MNP5 protocols. Data compression attempts to increase throughput by compressing the information to be sent before actually sending it. The modem is, thus, able to transmit more data in a given period of time. Table 17 details the Si2456/33/14 error correction and data compression modes of operation. mode if V.42 negotiation is unsuccessful. The V.42 specification allows an alternate error correction protocol, MNP2-4. MNP2-4 is enabled in \N2 mode. In \N2 mode, the Si2456/33/14 hangs up if an MNP2, 3, or 4 connection cannot be established. Wire Mode Wire mode (\N0) is used to communicate with standard non-error correcting modems. When optioned with \N3, the Si2456/33/14 falls back to wire mode if it fails in an attempt to negotiate a V.42 link with the remote modem. Error correction and data compression are not active in wire mode. Table 17. Enabling Error Correction/Data Compression To Enable V.42 (LAPM) V.42bis Wire V.42 and V.42bis only V.42 only MNP2-4 only MNP2-5 only No data compression and no error correction Use AT Commands \N3 and %C1 (default) Caller ID Operation The Si2456/33/14 supports full caller ID detection and decode for the US Bellcore and European ETSI protocols. The Si2456/33/14 detects the first ring burst signal and echoes "RING" to the host. The device starts searching for the caller ID preamble sequence after the appropriate time-out. When 50 continuous mark bits have been detected, the "CIDM" response is echoed to indicate that the mark has been detected and that caller ID data follows. If enabled (via the +VCID and +VCDT AT commands), the INT pin goes active. At this point, the algorithm looks for the first start bit, assemble the characters, and transmits them to the host as they are detected. When the caller ID burst finishes, the carrier is lost, and the modem echoes a "NO CARRIER" to indicate that the carrier is lost. At this point, the Si2456/33/14 continues detecting ring bursts and echoing "RING" for each burst and answers automatically after the correct number of rings. \N4 and %C1 \N4 and %C0 \N2 \N2 and %C1 \N0 and %C0 Error Correction The Si2456/33/14 ISOmodem can employ error correction (reliable) protocols to ensure error-free delivery of asynchronous data sent between the host and the remote end. The error control methods are based on grouping data into frames with checksums determined by the contents of each frame. The receiving modem checks the frames and sends acknowledgments to the transmitting modem. When it detects a faulty frame, the receiving modem requests a retransmission. Frame length varies according to the amount of data transmitted or the number of retransmissions requested from the opposite end. The Si2456/33/14 supports V.42 and MNP2-4 error correction protocols. V.42 (LAPM) is most commonly used and is enabled in \N3 and \N4 modes. In the default mode (\N3), the Si2456/33/14 attempts to connect with V.42 error correction and V.42bis data compression and falls back to either V.42 only or no error correction (wire mode) if necessary. In \N4 mode, the Si2456/33/14 hangs up if a V.42 connection cannot be established. If the ISOmodem hangs up in V.42 mode after all data is successfully sent, the result code is "OK". If the modem hangs up before all data is successfully sent, the result code is "No Carrier". The "No Carrier" result code will also be given in the \N4 UK Caller ID Operation When the Si2456/33/14 detects a line reversal, it echoes a "FLASH" to the host, and, if enabled, the INT pin activates. The ISOmodem begins searching for the Idle State Tone Alert Signal. When this signal has been detected, it echoes "STAS" to the host. After the Idle State Tone Alert Signal is completed, the ISOmodem applies the wetting pulse for the required 15 ms by quickly going off-hook and on-hook. From this point on, the algorithm is identical to that of Bellcore in that it searches for the channel seizure signal and the marks before echoing "CIDM" and reports the decoded caller ID data. Japan Caller ID Operation After a polarity reversal and the first ring burst are detected, the Si2456/33/14 is taken off-hook, and, if Rev. 0.9 35 Si2456/SI2433/Si2414 enabled, the INT pin is activated. After 40 1s (marks) have been detected, the Si2456/33/14 searches for a start bit, echo "CIDM", and begins assembling characters and transmitting them out through the serial port. When the carrier is lost, the Si2456/33/14 immediately hangs up and echoes "No Carrier". Off-Hook Intrusion Detection Force Caller ID Monitor (Always On) The Si2456/33/14 may be used to continuously monitor the phone line for the caller ID mark (1) FSK data. This can be useful in systems that require detection of caller ID data before the ring signal, voice mail indicator signals, and Type II caller ID support. The +VCDT AT command can be used to force the Si2456/33/14 into this mode. Parallel Phone Detection The ISOmodem is able to detect when another telephone, modem, or other device is using the phone line. This allows the host to avoid interrupting another phone call when the phone line is already in use and to intelligently handle an interruption when the ISOmodem is using the phone line. On-Hook Intrusion Detection When the ISOmodem is off-hook, an algorithm is implemented in the ISOmodem to automatically monitor the TIP-RING loop current via the LVCS register. Because the TIP-RING voltage drops significantly when off-hook, TIP-RING current is a better indicator of intrusion than TIP-RING voltage. When the ISOmodem is off-hook, the LVCS register switches from representing the TIP-RING voltage to representing the TIP-RING current. (See Figure 8 on page 38.) Upon detecting an intrusion, the ISOmodem alerts the host of the condition via the INT pin (the INT bit in parallel mode). The host must unmask this interrupt by setting the PPDM bit (U70, bit 10). After detecting the interrupt, the host should then issue the AT:I command to verify the reason for the interrupt was a parallel phone intrusion and to clear the PPD bit (U70, bit 2). The ISOmodem may be set to automatically hang up on a PPD interrupt by setting the HOI bit (U77, bit 11). The off-hook intrusion algorithm monitors the value of LVCS (U79, bits 4:0) at a sample rate determined by the OHSR (U76, bits 15:9) register (40 ms units). The algorithm compares each LVCS sample to the reference value in the ACL register (U76, bits 4:0). If LVCS is lower than ACL by an amount greater than DCL (U76, bits 7:5), the algorithm waits for another LVCS sample, and if the next LVCS sample is also lower than ACL by an amount greater than DCL, a PPD interrupt occurs. This helps the ISOmodem avoid a false PPD interrupt due to glitches on the phone line. The ACL is continually updated with the value of LVCS as outlined below. If desired, the host may force ACL to a fixed value by setting the FACL bit (U76, bit 8). The algorithm can be outlined as follows: If LVCS(t) = LVCS(t - 40 ms x OHSR) and LCVS(t) - ACL > DCL then ACL = LVCS(t) If (ACL - LVCS[t - 40 ms x OHSR]) > DCL) and (ACL - LVCS[t]) > DCL) then PPD = 1 and INT (INT bit in parallel mode) is asserted. The very first sample of LVCS the algorithm uses after going off-hook does not have any previous samples for comparison. If LVCS was measured during a previous call, this value of LVCS may be used as an initial reference. ACL may be written by the host with this known value of LVCS. If ACL is non-zero, the ISOmodem uses ACL as the first valid LVCS sample in the off-hook intrusion algorithm. If ACL is 0 (default after When the ISOmodem is sharing the telephone line with other devices, it is important that it not interrupt a call in progress. To detect whether another device is using the shared telephone line, the host can use the ISOmodem to monitor the TIP-RING dc voltage with the LVCS (Line Voltage and Current Sense) register (U79, bits 4:0). See Figure 7 on page 37. Set U69[2] (MODE) = 1 to read LVCS while on-hook. Before going off-hook, it is necessary to set U69[2] (MODE) = 0. The commands to accomplish this are listed in Table 18. Table 18. AT Commands AT Command Function AT:U69,0004 AT:U69,0000 36 Rev. 0.9 Si2456/SI2433/Si2414 reset), the ISOmodem ignores the register and does not begin operating the algorithm until two LVCS samples have been received. Additionally, immediately after a modem call, the ISOmodem is updated automatically ACL with the last valid LVCS value before a PPD intrusion or going back on-hook. The off-hook intrusion algorithm does not begin to operate immediately after going off-hook. This is to avoid triggering a PPD interrupt due to transients resulting from the ISOmodem itself going from on-hook to off-hook. The time from when the ISOmodem goes off-hook to when the intrusion algorithm begins defaults to 1 second and may be adjusted via the IST register (U77, bits 15:12). If ACL is written to a non-zero value before going off-hook, a parallel phone intrusion that occurs during this IST interval and sustains through the end of the interval triggers a PPD interrupt. The off-hook intrusion algorithm may, additionally, be disabled for a period of time after dialing begins via the IB register (U78, bits 15:14). This avoids triggering a PPD interrupt due to pulse dialing, open-switch intervals, or line transients from central office switching. Intrusion may be disabled from the start of dialing to the end of dialing (IB = 1), from the start of dialing to the timeout of the IS (U78, bits 7:0) register (IB = 2), or from the start of dialing to the connect result code (CONNECT XXX, NO DIALTONE, or NO CARRIER) (IB = 3). The off-hook intrusion algorithm is only suspended (not disabled) during this IB interval. Therefore, any intrusion that occurs during the IB interval and sustains through the end of the interval triggers a PPD interrupt. 30 25 20 LVC S BITS 15 10 5 0 036 9 12 15 18 21 24 28 30 33 36 39 42 45 47 51 54 57 60 63 66 69 72 75 78 81 84 87 Loop Voltage (V) 100 Figure 7. Loop Voltage Rev. 0.9 37 Si2456/SI2433/Si2414 Overload 30 25 20 LVCS BITS 15 CTR21 only 10 5 0 0 3 6 9 12 15 18 21 24 27 30 33 36 39 42 45 48 51 54 57 60 63 66 69 72 75 78 81 84 87 90 93 Loop Current (mA) 140 Figure 8. Loop Current Overcurrent Detection The Si2456/33/14 includes an overcurrent detection feature that measures the loop current at a programmable time after the Si2456/33/14 goes offhook. This allows the Si2456/33/14 to detect if it is connected to an improper telephone line (such as a digital PBX) that may damage the DAA. The overcurrent detection feature may be enabled by setting the OCDM bit (U70, bit 11). OHT (U77, bits 8:0) sets the delay after off-hook until the loop current is measured. If OCDM is enabled and excessive current is detected, the Si2456/ 33/14 will send the "X" result code and trigger an interrupt by asserting the INT pin (or set the INT bit in parallel mode). After an interrupt, the host should issue the AT:I command to verify the OCD interrupt and clear OCD bit (U70, bit 3). The host should hang up the modem with the ATH command immediately after an overcurrent is detected in order to avoid damaging the DAA. In the CTR21 mode of operation (see Table 19), the overcurrent detection can trip unnecessarily for loop current values greater than 55 mA. Therefore, if the ISOmodem is in CTR21 mode and an overcurrent condition is detected, the host should switch the ISOmodem into FCC mode and check the LVCS register for a valid overcurrent value equal to 0x1F. meet international PTT standards. Additionally, the user-access registers (via the AT:U and AT:R commands) may be programmed for countryspecific settings, such as dial tone, ring, ringback, and busy tone. Table 21 on page 42 contains a listing of these U-register settings for many countries. Additional settings may easily be implemented by following the Uregister descriptions. Firmware Upgrades The Si2456/33/14 contains an on-chip program ROM that includes the firmware required for the features listed in this data sheet. In addition, the Si2456/33/14 contains on-chip program RAM to accommodate minor changes to the ROM firmware. This allows Silicon Labs to provide future firmware updates to optimize the characteristics of new modem designs and those already deployed in the field. The firmware upgrade (provided by Silicon Labs) is a file loaded into the Si2456/33/14 after a reset using the AT:P command. Once loaded, the upgrade status can be read using the ATI1 command to verify the firmware revision number. The entire firmware upgrade in RAM is always cleared on reset. To reload the file after a reset or powerdown, the host simply rewrites the file using the "AT:P" command. (See Table 11 on page 23.) A CRC can be run on the file loaded into on-chip RAM, with the AT&T6 command to verify that the upgrade was correctly written to the on-chip memory. The CRC value obtained from executing the AT&T6 command should match the CRC value provided with the upgrade code. Global Operation The Si2456/33/14 chipset contains an integrated silicon direct access arrangement (Silicon DAA) that provides a programmable line interface to meet international telephone line interface requirements. Table 19 on page 39 gives the DAA register settings required to 38 Rev. 0.9 Si2456/SI2433/Si2414 Table 19. Country-Specific Register Settings Register Country OHS ACT U67 DCT RZ RT U68 LIM VOL U69 FLVM U4D LLC Australia1 Brazil2 CTR21 1, 3, 4 1 0 0 0 0 1 0 1 1 0 01 01 11 10 10 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 Czech Republic FCC1, 5 Latvia Malaysia Nigeria Philippines Poland7, 1 1,6 0 0 0 0 0 0 1 0 7 7 1 0 1 1 0 0 0 0 11 01 10 11 01 10 10 01 0 0 0 0 0 1 1 1 0 0 0 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 New Zealand Slovenia South Africa South Korea Note: 1. See "DC Termination" on page 68 for more information. 2. The following countries require the same settings as Brazil: Armenia, China, Egypt, Georgia, Japan, Jordan, Kazakhstan, Kyrgyzstan, Muldova, Oman, Pakistan, Qatar, Russia, Syria, Taiwan, Thailand, and Ukraine. 3. The following countries require the same settings as CTR21: Austria, Bahrain, Belgium, Bulgaria, Croatia, Cyprus, Denmark, Estonia, European Union, Finland, France, Germany, Greece, Guadeloupe, Iceland, Ireland, Israel, Italy, Lebanon, Liechtenstein, Luxembourg, Malta, Martinique, Morocco, Netherlands, Norway, Polynesia (French), Portugal, Reunion, Spain, Sweden, Switzerland, Turkey, and the United Kingdom. 4. When changing into or out of CTR21 Mode, LLC should be written first. 5. The following countries require the same settings as FCC: Argentina, Brunei, Canada, Chile, Columbia, Dubai, Equador, El Salvador, Guam, Hong Kong, Hungary, India, Indonesia, Kuwait, Macao, Mexico, Peru, Puerto Rico, Romania, Saudi Arabia, Singapore, Slovakia, Tunisia, UAE, USA, Venezuela, and Yemen. 6. Supported for loop current 20 mA. 7. SF5[1] (RZ) should only be set for Poland, South Africa, and South Korea if the ringer impedance network (C15, R14, Z2, Z3) is not populated. Rev. 0.9 39 Si2456/SI2433/Si2414 S-Registers The S command allows reading (Sn?) or writing (Sn=x) the S-registers. The S-registers store values for functions that typically are rarely changed, such as timers or counters, and the ASCII values of control characters, such as carriage return. Table 20 summarizes the S-register set. Table 20. S-Register Description Definition S-Register (Decimal) Function Default (Decimal) Range Units 0 Automatic answer--Number of rings the Si2456/33/14 must detect before answering a call. 0 disables auto answer. Ring counter. ESC code character. Carriage return character. Line feed character. Backspace character. Dial tone wait timer--Number of seconds the Si2456/ 33/14 waits before blind dialing. Only applicable if blind dialing is enabled (X0, X1, X3). Carrier wait timer--Number of seconds the Si2456/33/ 14 waits for carrier before timing out. This register also sets the number of seconds the modem waits for ringback when originating a call before hanging up. Dial pause timer for , and < dial command modifiers. Carrier presence timer--Time after a loss of carrier that a carrier must be detected before reactivating DCD. S9 is referred to as "carrier loss debounce time." Carrier loss timer--Time the carrier must be lost before the Si2456/33/14 disconnects. Setting 255 disables disconnect entirely. If S10 is less than S9, even a momentary loss of carrier causes a disconnect. Escape code guard timer--Minimum guard time required before and after "+++" for the Si2456/33/14 to recognize a valid escape sequence. Wait for dial tone delay value (in relation to the W dial modifier). Starts when "W" is executed in the dial string. 0 0-255 Rings 1 2 3 4 5 6 0 43 (+) 13 (CR) 10 (LF) 08 (BS) 02 0-255 0-255 0-255 0-255 0-255 0-255 Rings ASCII ASCII ASCII ASCII seconds 7 60 0-255 seconds 8 9 02 06 0-255 1-255 seconds 0.1 second 10 14 1-255 0.1 second 12 50 1-255 0.02 second 14 12 0-255 seconds 40 Rev. 0.9 Si2456/SI2433/Si2414 Table 20. S-Register Description (Continued) Definition S-Register (Decimal) Function Default (Decimal) Range Units 24 Sleep Inactivity Time--Sets the time that the modem operates in normal power mode with no activity on the serial port, parallel port, or telephone line before entering low-power sleep mode. This feature is disabled if the timer is set to 0. Disconnect Activity Timer--Sets the length of time that the modem stays online before disconnecting with no activity on the serial port, parallel port, or telephone line (Ring, hookswitch flash, or caller ID). This feature is disabled if set to 0. Hang Up Delay Time--Maximum delay between receipt of ATH0 command and hang up. If time out occurs before all data can be sent, the NO CARRIER (3) result code is sent (operates in V.42 mode only). "OK" response is sent if all data is transmitted before timeout. S38 = 255 disables timeout and modem disconnects only if data is successfully sent or carrier is lost. 0 0-255 seconds 30 0 0-255 minutes 38 20 0-255 seconds Rev. 0.9 41 Si2456/SI2433/Si2414 User-Access Registers (U-Registers) The :U AT command is used to write these 16-bit U-registers, and the :R command is used to read them. Uregisters are identified by a hexidecimal (hex) address. Table 21. U-Register Description Register Address (Hex) Name Description Default U00 U01 U02 U03 U04 U05 U06 U07 U08 U09 U0A U0B U0C U0D U0E U0F U10 U11 U12 U13 U14 U15 U16 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008 0x0009 0x000A 0x000B 0x000C 0x000D 0x000E 0x000F 0x0010 0x0011 0x0012 0x0013 0x0014 0x0015 0x0016 DT1A0 DT1B1 DT1B2 DT1A2 DT1A1 DT2A0 DT2B1 DT2B2 DT2A2 DT2A1 DT3A0 DT3B1 DT3B2 DT3A2 DT3A1 DT4A0 DT4B1 DT4B2 DT4A2 DT4A1 DTK DTON DTOF DT1 registers set the coefficients for stage 1 of the Dial Tone Detect filter. Biquad coefficients can be programmed as 16-bit 2s complement values scaled as 1.0 = 0xC000 with the formula: A0 + A1z-1 + A2z-2 1 + B1z-1 + B2z-2 Default is for FCC countries. See "Appendix C--User-Access Register Settings" on page 73 for other country settings. H(z) = Dial tone detect filters stage 2 biquad coefficients. 0x0800 0x0000 0x0000 0x0000 0x0000 0x00A0 0x6EF1 0xC4F4 0xC000 0x0000 Dial tone detect filters stage 3 biquad coefficients. 0x00A0 0x78B0 0xC305 0x4000 0xB50A Dial tone detect filters stage 4 biquad coefficients. 0x0400 0x70D2 0xC830 0x4000 0x80E2 Dial tone detect filter output scaler. Dial tone detect ON threshold. Dial tone detect OFF threshold. 0x0009 0x00A0 0x0070 42 Rev. 0.9 Si2456/SI2433/Si2414 Table 21. U-Register Description (Continued) Register Address (Hex) Name Description Default U17 U18 U19 U1A U1B U1C U1D U1E U1F U20 U21 U22 U23 U24 U25 U26 U27 U28 U29 U2A U2B U2C U2D 0x0017 0x0018 0x0019 0x001A 0x001B 0x001C 0x001D 0x001E 0x001F 0x0020 0x0021 0x0022 0x0023 0x0024 0x0025 0x0026 0x0027 0x0028 0x0029 0x002A 0x002B 0x002C 0x002D BT1A0 BT1B1 BT1B2 BT1A2 BT1A1 BT2A0 BT2B1 BT2B2 BT2A2 BT2A1 BT3A0 BT3B1 BT3B2 BT3A2 BT3A1 BT4A0 BT4B1 BT4B2 BT4A2 BT4A1 BTK BTON BTOF BT1 registers set the coefficients for stage 1 of the Busy Tone Detect filter. Default is for FCC countries. See "Appendix C--UserAccess Register Settings" on page 73 for other country settings. 0x0800 0x0000 0x0000 0x0000 0x0000 Busy tone detect filter stage 2 biquad coefficients. 0x00A0 0x6EF1 0xC4F4 0xC000 0x0000 Busy tone detect filter stage 3 biquad coefficients. 0x00A0 0x78B0 0xC305 0x4000 0xB50A Busy tone detect filter stage 4 biquad coefficients. 0x0400 0x70D2 0xC830 0x4000 0x80E2 Busy tone detect filter output scaler. Busy tone detect ON threshold. Busy tone detect OFF threshold. 0x0009 0x00A0 0x0070 Rev. 0.9 43 Si2456/SI2433/Si2414 Table 21. U-Register Description (Continued) Register Address (Hex) Name Description Default U2E 0x002E BMTT Busy cadence minimum total time in seconds multiplied by 7200. Country-specific settings for busy, ringback, and dialtone cadences are specified by a range for ON time (minimum ON and maximum ON) and a range for OFF time (minimum OFF and maximum OFF). The Si2456/33/14 uses three registers to fully specify this range: MTT, DLT, and MOT. MTT is the minimum total time and is equal to the minimum ON time plus the minimum OFF time. DLT is the allowable delta. This is equal to maximum total time (maximum ON time plus the maximum OFF time) minus the minimum total time (MTT). MOT is simply the minimum ON time. Example: A country specifies a busy tone with ON time from 1-2 seconds and OFF time from 3-4 seconds. Thus, minimum ON time = 1 sec, maximum ON time = 2 sec, minimum OFF time = 3 sec, and maximum OFF time = 4 sec. BMTT = 1 + 3 = 4 seconds, maximum total time = 2 + 4 = 6 seconds, so BDLT = 6 - 4 = 2 seconds, and BMOT = 1. Busy cadence delta in seconds multiplied by 7200. Busy cadence minimum on time in seconds multiplied by 7200. Ringback cadence minimum total time in seconds multiplied by 7200. Ringback cadence delta in seconds multiplied by 7200. Ringback cadence minimum on time in seconds multiplied by 7200. Window to look for dialtone in seconds multiplied by 1000. Minimum dialtone on time in seconds multiplied by 7200. Number of pulses to dial 0. Number of pulses to dial 1. Number of pulses to dial 2. Number of pulses to dial 3. Number of pulses to dial 4. Number of pulses to dial 5. Number of pulses to dial 6. Number of pulses to dial 7. Number of pulses to dial 8. Number of pulses to dial 9. Pulse dial break time (ms units). 0x0870 U2F U30 U31 U32 U33 U34 U35 U37 U38 U39 U3A U3B U3C U3D U3E U3F U40 U42 0x002F 0x0030 0x0031 0x0032 0x0033 0x0034 0x0035 0x0037 0x0038 0x0039 0x003A 0x003B 0x003C 0x003D 0x003E 0x003F 0x0040 0x0042 BDLT BMOT RMTT RDLT RMOT DTWD DMOT PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9 PDBT 0x25F8 0x0438 0x4650 0xEF10 0x1200 0x1B58 0x2D00 0x000A 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008 0x0009 0x003D 44 Rev. 0.9 Si2456/SI2433/Si2414 Table 21. U-Register Description (Continued) Register Address (Hex) Name Description Default U43 U45 U46 0x0043 0x0045 0x0046 PDMT PDIT DTPL Pulse dial make time (ms units). Pulse dial interdigit time (ms units). DTMF power level--16-bit format is 0x0(H)(L)0 where H is the (-)dBm level of the high-frequency DTMF tone and L is the (-)dBm level of the low-frequency DTMF tone. Note that twist may be specified here. DTMF on time (ms units). DTMF off time (ms units). Ring frequency high--Maximum frequency ring to be considered a valid ring. RGFH = 2400/(maximum ring frequency). Ring delta 1 1 RGFD = 2400 Hz x ---------------------------------------------- - ----------------------------------------------- min ring freq (Hz) max ring freq (Hz) 0x0027 0x0320 0x09B0 U47 U48 U49 U4A 0x0047 0x0048 0x0049 0x004A DTNT DTFT RGFH RGFD 0x0064 0x0064 0x0022 0x007A U4B U4C U4D U4E U4F U50 U51 U52 0x004B 0x004C 0x004D 0x004E 0x004F 0x0050 0x0051 0x0052 RGMN RGNX MOD1 PRDD FHT LCDN LCDF XMTL Ring cadence minimum ON time in seconds multiplied by 2400. Ring cadence maximum total cadence in seconds multiplied by 2400. This is a bit-mapped register. Pre-dial delay-time after ATD command that modem waits to dial (ms units). The Si2456/33/14 stays on-hook during this time. Flash Hook Time. Time corresponding with "!" or "&" dial modifier that the Si2456/33/14 goes on-hook during a flash hook (ms units). Loop current debounce on time (ms units). Loop current debounce off time (ms units). Transmit level (1 dB units)--Sets the modem data pump transmitter level. Default level of 0 corresponds to -9.85 dBm. Transmit level = -(9.85 + XMTL) dBm. Range = -9.85 to -48. This is a bit-mapped register. This is a bit-mapped register. This is a bit-mapped register. This is a bit-mapped register. This is a bit-mapped register. This is a bit-mapped register. This is a bit-mapped register. 0x0258 0x6720 0x0000 0x0000 0x01F4 0x015E 0x00C8 0x0000 U53 U62 U65 U66 U67 U68 U69 0x0053 0x0062 0x0065 0x0066 0x0067 0x0068 0x0069 MOD2 DAAC1 DAAC4 DAAC5 ITC1 ITC2 ITC3 0x0000 0x0804 0x00E0 0x0040 0x0008 0x0000 0x0000 Rev. 0.9 45 Si2456/SI2433/Si2414 Table 21. U-Register Description (Continued) Register Address (Hex) Name Description Default U6A U6E U70 U71 U76 U77 U78 U79 U7A 0x006A 0x006E 0x0070 0x0071 0x0076 0x0077 0x0078 0x0079 0x007A ITC4 CK1 IO0 IO1 GEN1 GEN2 GEN3 GEN4 GENA This is a bit-mapped register. This is a bit-mapped register. This is a bit-mapped register. This is a bit-mapped register. This is a bit-mapped register. This is a bit-mapped register. This is a bit-mapped register. This is a bit-mapped register. This is a bit-mapped register. n/a 0x1F20 0x2B00 0x0000 0x3240 0x401E 0x0000 0x0000 0x0000 46 Rev. 0.9 Si2456/SI2433/Si2414 Table 22. Bit-Mapped U-Register Summary Reg. Name Bit 15 Bit 14 TOCT REV FOH PWM PWMG PDN FDT OFF OHS ACT LIM DIAL FJM VOL FLVM DCT BTE MODE OVL R1 HES TES CIDM OHSR IST IB HOI AOC OCDM PPDM RIM DCDM FACL DCL OHT IS LVCS DOP RIGPO LLV AUSDC V22HD HDLC FAST RIGPOEN FDP RST CID OCD SDSP PPD ACL RI N1 DCD RZ ROV RT BTD PDL DL Bit 13 Bit 12 NHFP Bit 11 NHFD Bit 10 CLPD Bit 9 CCAD Bit 8 FTP Bit 7 SPDM Bit 6 Bit 5 GT18 Bit 4 GT55 Bit 3 CTE Bit 2 Bit 1 LLC Bit 0 U4D U53 MOD1 MOD2 U62 DAAC1 U65 DAAC4 U66 DAAC5 U67 U68 U69 U6A U6E U70 U76 U77 U78 U79 U7A U7C U7D ITC1 ITC2 ITC3 ITC4 CK1 IO0 GEN1 GEN2 GEN3 GEN4 GENA GENC GEND Rev. 0.9 47 Si2456/SI2433/Si2414 Bit-Mapped U-Register Detail (defaults in bold) U4D MOD1 Bit D15 D14 TOCT R/W D13 D12 NHFP R/W D11 NHFD R/W D10 CLPD R/W D9 CCAD R/W D8 D7 D6 D5 GT18 R/W D4 GT55 R/W D3 CTE R/W D2 D1 LLC R/W D0 Name Type FTP SPDM R/W R/W Reset settings = 0x0000 Bit 15 14 Name Reserved TOCT Function 13 12 Reserved NHFP 11 NHFD 10 CLPD 9 CCAD 8 FTP 7 SPDM 6 5 Reserved GT18 4 GT55 3 CTE 2 Reserved Read returns zero. Turn Off Calling Tone. 0 = Disable. 1 = Enable. Read returns zero. No Hook Flash Pulse. 0 = Disable. 1 = Enable. No Hook Flash Dial. 0 = Disable. 1 = Enable. Check Loop Current Before Dialing. 0 = Ignore. 1 = Check. Check Carrier at Data (confirm carrier before entering Data mode). 0 = Disable. 1 = Enable. Force Tone or Pulse. 0 = Disable. 1 = Enable. Skip Pulse Dial Modifier. 0 = No. 1 = Yes. Read returns zero. 1800 Hz Guard Tone Enable. 0 = Disable. 1 = Enable. 550 Hz Guard Tone Enable. 0 = Disable. 1 = Enable. Calling Tone Enable. 0 = Disable. 1 = Enable. Read returns zero. 48 Rev. 0.9 Si2456/SI2433/Si2414 Bit 1 Name LLC Function Low Loop Current Detect (required for CTR21). 0 = Disabled. 1 = Enabled. Read returns zero. 0 Reserved U53 MOD2 Bit D15 REV R/W D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name Type Reset settings = 0x0000 Bit 15 Name REV Function V.23 Reversing. 0 = Disable. 1 = Enable. Read returns zero. 14:0 Reserved U62 DAAC1 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name Type 0 0 0 0 1 0 0 0 0 0 0 0 0 FOH DL 0 R/W R/W Reset settings = 0x0804 Bit Name Function 15:12 11 10:3 2 Reserved Reserved Reserved FOH Must be set 0. Must be set 1. Must be set 0. Fast Off-Hook. 0 = Automatic Calibration Time set to 426 ms 1 = Automatic Calibration Time set to 106 ms Isolation Digital Loopback (see the AT&T commands). 0 = Loopback occurs beyond the ISOcap interface, out to and including the analog hybrid circuit. 1 = Enables digital loopback mode across isolation barrier only. 1 DL 0 Reserved Must be set 0. Rev. 0.9 49 Si2456/SI2433/Si2414 U65 DAAC4 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 PDL R/W D3 D2 D1 D0 Name PWM PWMG PDN Type R/W R/W R/W Reset settings = 0x00E0 Bit Name Function PWM Mode. 0 = Normal. Classic PWM output waveform. 1 = Scrambled mode. Low distortion mode if used with output circuit shown in Figure 5 on page 14. PWM Gain. 0 = No gain. 1 = 6 dB gain applied to AOUT. Powerdown. Completely powerdown the Si2456/33/14 and Si3015. Once set to 1, the Si2456/33/14 must be reset to power on. 0 = Normal. 1 = Powerdown. 15 PWM 14 PWMG 13 PDN 12:8 7:5 4 Reserved Reserved PDL* Read returns zero. Must not change in a read-modify-write. Powerdown Line-Side Chip. 0 = Normal operation. 1 = Places the Si3015 in powerdown mode. 3:0 Reserved Must not change in a read-modify-write. *Note: Typically used only for board-level debug. 50 Rev. 0.9 Si2456/SI2433/Si2414 U66 DAAC5 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name Type Reset settings = 0x0040 Bit Name FDT R Function 15:7 6 Reserved FDT* Read returns zero. Frame Detect. 0 = Indicates ISOcap has not established frame lock. 1 = Indicates ISOcap frame lock has been established. 5:4 3:0 Reserved Reserved Read returns zero. Do not modify. *Note: Typically used only for board-level debug. Rev. 0.9 51 Si2456/SI2433/Si2414 U67 ITC1 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name Type Reset settings = 0x0008 Bit Name OFF OHS ACT R/W R/W R/W DCT R/W RZ R/W RT R/W Function 15:8 7 Reserved OFF Read returns zero. DC Termination Off. 0 = Normal operation. The OFF bit must always be set to 0 when on-hook. 1 = DC termination disabled and the device presents an 800 dc impedance to the line, which is used to enhance operation with an off-hook parallel phone. On-Hook Speed. 0 = The Si2456/33/14 will execute a fast on-hook. 1 = The Si2456/33/14 will execute a slow controlled on-hook. AC Termination Select. 0 = Selects the real impedance. 1 = Selects the complex impedance. 6 OHS1,2 5 ACT1,2 4 3:2 Reserved DCT1,2 Read returns zero. DC Termination Select. 00 = Low Voltage mode (Transmit level = -13.85 dBm). 01 = Japan mode (Transmit level = -11.85 dBm). 10 = FCC mode. Standard voltage mode (Transmit level = -9.85 dBm). 11 = CTR21 mode. Current limiting mode (Transmit level = -9.85 dBm). Ringer Impedance. 0 = Maximum (high) ringer impedance. 1 = Synthesize ringer impedance. C15, R14, Z2, and Z3 must not be installed when setting this bit. See "Ringer Impedance" on page 69. Ringer Threshold Select. Used to satisfy country requirements on ring detection. Signals below the lower level does not generate a ring detection; signals above the upper level are guaranteed to generate a ring detection. 0 = 11 to 22 VRMS. 1 = 17 to 33 VRMS. 1 RZ1,2 0 RT1,2 Notes: 1. See Table 19 on page 39 2. See "Appendix A--DAA Operation" on page 67 52 Rev. 0.9 Si2456/SI2433/Si2414 U68 ITC2 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name Type Reset settings = 0x0000 Bit Name Function LIM R/W BTE ROV BTD R/W R/W R/W 15:8 7:5 4 Reserved Reserved LIM1,2 Read returns zero. Do not modify. Current Limit. 0 = All other modes. 1 = CTR21 mode. 3 2 Reserved BTE2 Do not modify. Billing Tone Protect Enable. 0 = Disabled. 1 = Enabled. When set, the DAA responds automatically to a collapse of the line-derived power supply during a billing tone event. When off-hook, if BTE = 1 and BTD goes high, the dc termination is released (800 presented to line). If BTE and RIM (U70, bit 9) are set, an RI (U70, bit 1) interrupt also occurs when BTD goes high. Receive Overload. The bit is set when the receive input (i.e., receive pin goes below ground) has an excessive input level. This bit is cleared by writing a 0 to this location. 0 = Normal receive input level. 1 = Excessive receive input level. Billing Tone Detected. This bit is set if a billing tone is detected. This bit is cleared by writing a 0 to this location. 0 = No billing tone. 1 = Billing tone detected. 1 ROV2 0 BTD2 Notes: 1. See Table 19 on page 39 2. See "Appendix A--DAA Operation" on page 67 Rev. 0.9 53 Si2456/SI2433/Si2414 U69 ITC3 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 DIAL R/W D5 FJM R/W D4 VOL R/W D3 FLVM D2 MODE D1 D0 Name Type Reset settings = 0x0000 Bit Name Function 15:8 7 6 Reserved Reserved DIAL Read returns zero. Do not modify. Must be set to zero. DTMF Dialing Mode. This bit should be set during DTMF dialing in CTR21 mode if LVCS < 12. 0 = Normal operation. 1 = Increase headroom for DTMF dialing. Force Japan DC Termination Mode. 0 = Normal Gain. 1 = When DCT = 2 (FCC mode), setting this bit forces Japan dc termination mode while allowing for a transmit level of -1 dBm. See "DTMF Dialing" on page 69. Line Voltage Adjust. When set, this bit adjusts the TIP-RING line voltage. Lowering this voltage improves margin in low voltage countries. Raising this voltage may improve large signal distortion performance. 0 = Normal operation. 1 = Lower DCT voltage. Force Low Voltage Mode. When DCT (U67, bits 3:2) = 10 (FCC mode), setting FLVM forces the Low Voltage mode (see DCT = 00) while allowing for a transmit level of -1 dBm. 0 = Disable. 1 = Enable. Mode. MODE = 1b enables on-hook line monitor. MODE must be disabled (MODE = 0b) before the modem can go off-hook, dial, or answer a call. 0 = Disable. 1 = Enable. 5 FJM 4 VOL1,2 3 FLVM1,2 2 MODE 1:0 Reserved Do not modify. Notes: 1. See Table 19 on page 39 2. See "Appendix A--DAA Operation" on page 67 54 Rev. 0.9 Si2456/SI2433/Si2414 U6A ITC4 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name Type Reset settings = N/A Bit Name Function OVL R 15:3 2 Reserved OVL* Read returns zero. Overload Detected. This bit has the same function as ROV, but clears itself after the overload has been removed. See "Billing Tone Detection" on page 69. This bit is not affected by the BTE bit. 1:0 Reserved Do not modify. *Note: See "Appendix A--DAA Operation" on page 67. Rev. 0.9 55 Si2456/SI2433/Si2414 U6E CK1 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name Type Reset settings = 0x1F00 Bit Name R1 R/W RST R/W SDSP R/W N1 R/W Function 15:13 12:8 Reserved R1* Do not modify. R1 0 R1 CLKOUT Divider CLKOUT off. R1 + 1 (default R1 = 31; 2.4576 MHz). R1 = 31 required for proper codec interface operation. 7:5 4 Reserved RST Read returns zero. Hardware Reset. This bit functions exactly as the digital inverse of the RESET pin. Writing this bit to 1 causes a hardware reset. 3 2 Reserved SDSP* Read returns zero. Slow DSP. 0 = No divider. 1 = Extra divide-by-8 on DSP clock. N1 0 1 2 3 DSP_CLK Divider 2 2.5 3 4 1:0 N1* Note: See Figure 6 on page 22. 56 Rev. 0.9 Si2456/SI2433/Si2414 U70 IO0 Bit D15 HES R/W D14 D13 TES R/W D12 R/W D11 R/W D10 R/W D9 RIM R/W D8 DCDM R/W D7 D6 D5 D4 CID R/W D3 OCD R/W D2 PPD R/W D1 RI R/W D0 DCD R/W Name Type CIDM OCDM PPDM Reset settings = 0x2700 Bit 15 Function Hardware Escape Pin. 0 = Disable. 1 = Enable. Reserved Read returns zero. Enable "+++" Escape. TES 0 = Disable. 1 = Enable. CIDM Caller ID Mask. 0 = Change in CID will not affect INT. 1 = A low to high transition in CID activates INT. OCDM Overcurrent Detect Mask. 0 = Change in OCD does not affect INT. ("X" result code is not generated in Command mode.) 1 = A low to high transition in OCD will activate INT. ("X" result code is generated in Command mode.) Parallel Phone Detect Mask. PPDM 0 = Change in PPD does not affect INT. 1 = A low to high transition in PPD will activate INT. RIM Ring Indicator. 0 = Change in RI does not affect INT. 1 = A low to high transition in RI activates INT. DCDM Data Carrier Detect Mask. 0 = Change in DCD does not affect INT. 1 = A high to low transition in DCD (U70, bit 0), which indicates loss of carrier, activates INT. Reserved Must be set to zero. Reserved Read returns zero. CID Caller ID (sticky). Caller ID preamble has been detected; data will soon follow. Clears on :I read. OCD Overcurrent Detect (sticky). Overcurrent condition has occurred. Clears on :I read. Parallel Phone Detect (sticky). PPD Parallel phone detected since last off-hook event. Clears on :I read. Name HES 14 13 12 11 10 9 8 7 6:5 4 3 2 Rev. 0.9 57 Si2456/SI2433/Si2414 Bit 1 Name RI Function Ring Indicator. Active high bit when the Si2456/33/14 is on-hook, indicates ring event has occurred. Clears on :I read. Data Carrier Detect (status). Active high bit indicates carrier detected (equivalent to inverse of DCD pin). 0 DCD 58 Rev. 0.9 Si2456/SI2433/Si2414 U76 GEN1 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name Type Reset settings = 0x3240 Bit Name OHSR R/W FACL DCL R/W ACL R/W Function Off-Hook Sample Rate (40 ms units) Sets the sample rate for the off-hook intrusion algorithms (1 second default). Force ACL. 0 = While off-hook, ACL is automatically updated with LVCS. 1 = While off-hook, ACL does not change from the value written to it while on-hook. Differential Current Level (3 mA units). Sets the differential level between ACL and LVCS that will trigger an off-hook PPD interrupt (default = 2). Absolute Current Level (3 mA units, see Figure 7 on page 37). ACL represents the value of LVCS current when the ISOmodem is off-hook and all parallel phones are on-hook. If ACL = 0, then it is ignored by the off-hook intrusion algorithm.The ISOmodem will also write ACL with the contents of LVCS before an intrusion and before going on-hook (default = 0). 15:9 8 OHSR FACL 7:5 DCL 4:0 ACL Rev. 0.9 59 Si2456/SI2433/Si2414 U77 GEN2 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name Type IST R/W HOI R/W AOC R/W OHT R/W Reset settings = 0x401E Bit Name Function Intrusion Settling Time (250 ms units). 15:12 IST Delay between when the ISOmodem goes off-hook and the off-hook intrusion algorithm begins. Default is 1 second. 11 HOI Hang-Up On Intrusion. 0 = ISOmodem will not automatically hang up when an off-hook PPD interrupt occurs. 1 = ISOmodem automatically hangs up on a PPD interrupt. 10 9 Reserved AOC Read returns zero. Overcurrent Protection. Enable Overcurrent protection. 0 = Disable. 1 = Enable. Note: AOC may falsely detect an overcurrent condition in the presence of line reversals or other transients. Therefore, this feature should not be used in applications or locations (such as Japan) where line reversals are common or may be expected. 8:0 OHT Off-Hook Time (1 ms units). Time before LVCS is checked for overcurrent condition after going off-hook (30 ms default). 60 Rev. 0.9 Si2456/SI2433/Si2414 U78 GEN3 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name Type IB R/W IS R/W Reset settings = 0x0000 Bit Name Function Intrusion Blocking Defines the method used to block the off-hook intrusion algorithm from operation after dialing has begun. 0 = No intrusion blocking. 1 = Intrusion disabled from start of dial to end of dial. 2 = Intrusion disabled from start of dial to IS register time-out. 3 = Intrusion disabled from start of dial to connect ("CONNECT XXX", "NO DIALTONE", or "NO CARRIER"). 15:14 IB 13:8 7:0 Reserved IS Read returns zero. Intrusion Suspend (500 ms units). When IB = 2, this register sets the length of time from when dialing begins that the off-hook intrusion algorithm is blocked (suspended) (default = 00000000b). Rev. 0.9 61 Si2456/SI2433/Si2414 U79 GEN4 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name Type Reset settings = 0x0000 Bit Name Function LVCS R 15:5 4:0 Reserved LVCS Read returns zero. Line Voltage Current Sense. Represents either the line voltage, loop current, or on-hook line monitor depending on the state of the MODE, OFHK, and ONHM bits. On-Hook Voltage Monitor (2.75 V/bit 20%) (see Figure 7 on page 37). 00000 = No line connected. 00001 = Minimum line voltage (VMIN = 3.0 V 0.5 V). 11111 = Maximum line voltage (87 V 20%). The line voltage monitor full scale may be modified by changing R5 as follows: VMAX = VMIN + 4.2 (10M + R5 + 1.6k)/(R5 +1.6k)/5 U69[2] (MODE) must be set to 1b before reading LVCS while the ISOmodem is on-hook. See MODE on page 54. U69[2] (MODE) must be disabled (MODE = 0b) before the ISOmodem can go off-hook, dial, or answer a call. Off-Hook Loop Current Monitor (3 mA/bit) (see Figure 8 on page 38). 00000 = No loop current. 00001 = Minimum loop current. 11110 = Maximum loop current. 11111 = Loop current is excessive (overload). Overload > 140 mA in all modes except CTR21 Overload > 54 mA in CTR21 mode 62 Rev. 0.9 Si2456/SI2433/Si2414 U7A GENA Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name Type Reset settings = 0x0000 Bit Name DOP V22HD HDLC FAST Function 15:8 7 Reserved DOP Read returns to zero. Dial or Pulse. 0 = Normal ATDTW operation 1 = Use ATDTW for Pulse/Tone Dial Detection (see also ATDW command) 6:3 2 Reserved V22HD Read returns to zero. V.22bis Synchronous Mode.* 0 = Normal asynchronous mode. 1 = Transparent HDLC mode. Synchronous Mode.* 0 = Normal asynchronous mode. 1 = Transparent HDLC mode. Fast Connect.* 0 = Normal modem handshake timing per ITU/Bellcore standards. 1 = Fast connect modem handshake timing. 1 HDLC 0 FAST *Note: When V22HD, HDLC, or FAST bits are set, \N0 (wire mode) must be used. U7C GENC Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name Type Reset settings = 0x0000 Bit 15:5 4 RIGPO R RIGPOEN R/W 3:1 0 Function Reads returns to zero. RI RI (pin 15), follows this bit when RIGPIOEN = 1b. Reserved Reads returns to zero. RIGPOEN 0 = RI indicates valid ring signal. (Normal ring-indicator mode) 1 = RI (Pin 15) can be used as a general purpose output and follows U7C[4] (RIGPO). Name Reserved RIGPO Rev. 0.9 63 Si2456/SI2433/Si2414 U7D GENC Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name Type Reset settings = 0x0000 Bit 15:11 10 Name Reserved LLV LLV AUSDC R/W R/W FDP Function 9 AUSDC 0 FDP Reads returns to zero. 0 = Normal operation. 1 = Enables an optional algorithm for countries, such as Japan and Malaysia, with low loop voltage. Also set U67[3:2] (DCT) = 00b, U69[4] VOL = 1b, and U52 = 0x0002 before going off-hook. When the modem goes off-hook, it samples LVCS and changes DCT and VOL as necessary to maximize transmit levels and optimize distortion. 0 = Normal operation. 1 = Causes the modem to go off-hook in Japan mode and then revert to FCC mode after 500 ms. This allows the modem to meet the Australian line seizure requirements while allowing the maximum transmit power (optional for Australia and when DCT = 01b). FSK Data Processing. 0 = FSK data processing stops when carrier is lost. 1 = FSK data processing continued for 2 bytes after carrier is lost. 64 Rev. 0.9 Si2456/SI2433/Si2414 Parallel Interface Registers Parallel Interface 0 (0x00) Bit D7 D6 D5 D4 D3 D2 D1 D0 Name Type Reset settings = 0x00 Bit Name TX/RX R/W Function Parallel Interface Transmit/Receive. This register functions similarly to the serial port TX pin on writes to the parallel port, and similarly to the serial port RX pin on reads from the parallel port. 7:0 TX/RX Rev. 0.9 65 Si2456/SI2433/Si2414 Parallel Interface 1 (0x01) Bit D7 D6 D5 D4 D3 D2 D1 D0 Name Type RXF R TXE REM INTM R R R/W INT R ESC RTS R/W R/W CTS R Reset settings = 0110_0011 Bit Name Function Receive FIFO Almost Full (status). 0 = Receive FIFO (12 deep) contains three or more empty locations (RXF 9). 1 = Receive FIFO contains two or less empty locations (RXF 10). Requires servicing within xx ms to avoid overflow. Transmit FIFO Almost Empty (status). 0 = Transmit FIFO (14 deep) contains three or more characters (TXF 3). 1 = Transmit FIFO contains two or less characters (TXF 2). Requires servicing within xx ms to avoid underflow. Receive FIFO Empty. 0 = Receive FIFO has valid data. 1 = Receive FIFO empty. Interrupt Mask. 0 = In parallel mode, the INT pin is triggered by a rising edge on RXF or TXE only (default). 1 = In parallel mode, the INT pin is triggered by a rising edge on RXF, TXE, or INT. Interrupt. 0 = No interrupt has occurred. 1 = Indicates that an interrupt (CID, OCD, PPD, RI, or DCD from U70) has occurred. This bit is cleared via the AT:I command. Escape. Operation of this bit in parallel mode is functionally equivalent to the ESC pin in serial mode. Request-to-Send. Operation of this bit in parallel mode is functionally equivalent to the RTS pin in serial mode. Use of the CTS and RTS bits (as opposed to the TXE and RXF bits) allows the flow control between the host and the ISOmodem to operate 1 byte at a time, rather than in blocks. Clear-to-Send. Operation of this bit in parallel mode is functionally equivalent to the CTS pin in serial mode. Use of the CTS and RTS bits (as opposed to the TXE and RXF bits) allows the flow control between the host and the ISOmodem to operate 1 byte at a time, rather than in blocks. 7 RXF 6 TXE 5 REM 4 INTM 3 INT 2 1 ESC RTS 0 CTS 66 Rev. 0.9 Si2456/SI2433/Si2414 APPENDIX A--DAA OPERATION Introduction This appendix describes the detailed functionality of the integrated DAA included in the Si2456/33/14//Si3015 chipset. Application Circuit" schematic on page 11 and global "Bill of Materials: Si2456/33/14 Chipset" on page 12 contained in this data sheet are designed to be compliant to these standards. It should be noted that L1, L2, R31, R32, C38, and C39 are only necessary for those products intended for sale in the European Union or any countries that require CISPR-22 compliance. If this is not the target market, L1 and L2 can be replaced with 0 resistors, and R31, R32, C38, and C39 need not be populated. While this population option achieves EN55022 and CISPR-22 compliance, there are several systemdependent and country-dependent issues worth considering. The first relates to the direct current resistance (DCR) of the inductors. If the selected inductors have a DCR of less than 3 each, countries that require 300 or less of dc resistance at TIP and RING with 20 mA of loop current can be satisfied with the Japan DC termination mode (DCT = 01). If the selected inductors have a DCR of greater than 3 but less than 8 each, low voltage dc termination mode (DCT = 00) must be used to satisfy the above requirement. In either case, Silicon Laboratories strongly recommends that users of the ISOmodem adhere to the section, "DC Termination" on page 68, for their dc termination requirements. The second consideration relates to the power supply of the target system. The recommended values for L1, L2, R31, R32, C38, and C39 assume that the target system provides a direct current connection between the target system's reference ground (Si2456/33/14 GND) and an external ground (often the third prong of a power plug). If there is no direct connection between the reference ground and external ground, smaller inductor values are possible. It should be understood that this consideration is system-dependent, and the impedance between the system ground and the external ground in the range of 500 kHz and 10 MHz should be well known. Please contact a Silicon Laboratories technical representative if you need assistance in analyzing or testing your system for this consideration. DAA Isolation Barrier The Si2456/33/14 chipset consists of the Si3015 line side device and the Si2456/33/14 modem device. The Si2456/33/14 achieves an isolation barrier through a low-cost high-voltage capacitor in conjunction with Silicon Laboratories' proprietary ISOcap signal processing techniques. These techniques eliminate any signal degradation due to capacitor mismatches, common mode interference, or noise coupling. As shown in the "Typical Application Circuit" on page 11, the C1, C4, C24, and C25 capacitors isolate the Si2456/ 33/14 (DSP-side) from the Si3015 (line-side). All transmit, receive, and control data are communicated through this barrier. Emissions/Immunity The Si2456/33/14 chipset and recommended DAA schematic are fully-compliant with and pass all international electromagnetic emissions and conducted immunity tests (includes FCC part 15,68; EN50082-1). Careful attention to the "Bill of Materials: Si2456/33/14 Chipset" on page 12, "Typical Application Circuit" schematic on page 11, and layout guidelines ensure compliance with these international standards. In designs with difficult layout constraints, the addition of the C22 and C30 capacitors to the C24 and C25 recommended capacitors may improve modem performance on emissions and conducted immunity. For such designs, a population option for C22 and C30 may allow additional flexibility for optimization after the printed circuit board has been completed. EN55022 and CISPR-22 Compliance Pending ratification in July 2001 of the CISPR-22 standard, effective August 1, 2001, compliance to the EN55022:1998 standard is necessary to conform to the European Union's EMC Directive and display the CE mark on designs intended for sale in the European Union. However, EN55022 and CISPR-22 compliance is currently under review. Consequently, as of June 2001, compliance requirements may change, and the compliance date may be extended beyond August 2001. Additionally, some countries may require compliance to the CISPR-22 specification. The "Typical Rev. 0.9 67 Si2456/SI2433/Si2414 DC Termination The Si2456/33/14 has four programmable dc termination modes that are selected with DCT (U67, bits 3:2). FCC mode (DCT = 10), shown in Figure 9, is the default dc termination mode and supports a transmit full-scale level of -1 dBm at TIP and RING. This mode meets FCC requirements in addition to the requirements of many other countries. FCC DCT M ode Japan mode DCT = 01, shown in Figure 11, is a lower voltage mode and supports a transmit full-scale level of -2.71 dBm. Higher transmit levels for DTMF dialing are also supported. See "DTMF Dialing" on page 69. The low voltage requirement is dictated by countries, such as Japan and Malaysia. 10.5 Japan DCT M ode V oltage A c ros s DA A (V ) 10 9.5 9 8.5 8 7.5 7 6.5 6 5.5 .01 .02 .03 .04 .05 .06 .07 .08 .09 .1 12 V oltage A c ros s DA A (V ) 11 10 9 8 7 6 .01 .02 .03 .04 .05 .06 .07 .08 .09 .1 .11 .11 Loop Current (A ) Figure 11. Japan Mode I/V Characteristics Loop Current (A ) Figure 9. FCC Mode I/V Characteristics CTR21 mode DCT = 11, shown in Figure 10, provides current limiting while maintaining a transmit full-scale level of -1 dBm at TIP and RING. The dc termination current limits before reaching 60 mA. 45 CTR21 DCT M ode Low Voltage mode (DCT = 00), shown in Figure 12, is the lowest line voltage mode supported on the Si2456/ 33/14 with a transmit full-scale level of -5 dBm. Higher transmit levels for DTMF dialing are also supported. See "DTMF Dialing" on page 69. This low-voltage mode is offered for situations that require very low line voltage operation. It is important to note that this mode should only be used when necessary because the dynamic range is significantly reduced, and, thus, the ISOmodem is not able to transmit or receive large signals without clipping them. 10.5 V oltage A c ros s DA A (V ) 40 35 30 25 20 15 10 5 .015 .02 .025 .03 .035 .04 .045 .05 .055 .06 Low V oltage M ode V oltage A c ros s DA A (V ) 10 9.5 9 8.5 8 7.5 7 6.5 6 5.5 .01 .02 .03 .04 .05 .06 .07 .08 .09 .1 Loop Current (A ) Figure 10. CTR21 Mode I/V Characteristics .11 Loop Current (A ) Figure 12. Low Voltage Mode I/V Characteristics 68 Rev. 0.9 Si2456/SI2433/Si2414 AC Termination The Si2456/33/14 has two ac Termination impedances that are selected with the ACT bit (U67, bit 5). ACT = 0 is a real nominal 600 termination, which satisfies the impedance requirements of FCC part 68, JATE, and other countries. This real impedance is set by circuitry internal to the Si3015 as well as the resistor R2 connected to the REXT pin. ACT = 1 is a complex impedance, which satisfies the impedance requirements of Australia, New Zealand, South Africa, CTR21, and some European NET4 countries, such as the UK and Germany. This complex impedance is set by circuitry internal to the Si3015 as well as the complex network formed by R12, R13, and C14 connected to the REXT2 pin. (~1 F, 250 V) and expensive. In the Si2456/33/14, the OHS bit (U67, bit 6) can be used to slowly ramp down the loop current to pass these tests without requiring additional components. DTMF Dialing In CTR21 dc termination mode, the DIAL bit (U69, bit 6) should be set during DTMF dialing if LVCS 12. Setting this bit increases headroom for large signals. This bit should only be used during dialing and if LVCS < 11. In Japan dc termination mode (DCT [U67, bits 3:2] = 01), the ISOmodem attenuates the transmit output by 1.7 dB to meet headroom requirements. Similarly, in Low Voltage mode (DCT = 00), the ISOmodem attenuates the transmit output by 4 dB. However, when DTMF dialing is desired in these modes, this attenuation must be removed. This is achieved by entering the FCC dc termination mode and setting the FJM bit (U69, bit 5). When in the FCC dc termination modes, these bits enable the respective lower loop current termination modes without the associated transmit attenuation. Increased distortion may be observed, which is acceptable during DTMF dialing. After DTMF dialing is complete, the attenuation should be enabled by returning to either the Japan dc termination mode (DCT = 01) or the Low Voltage termination mode (DCT = 00). The FJM and the FLVM bits have no effect in any other termination mode other than the FCC dc termination mode. Ringer Impedance The ring detector in a typical DAA is ac-coupled to the line with a large 1 F, 250 V decoupling capacitor. The ring detector on the Si2456/33/14 is also capacitivelycoupled to the line, but it is designed to use smaller, less expensive 1.8 nF capacitors. Inherently, this network produces a high ringer impedance to the line of approximately 800-900 k. This value is acceptable for most countries including FCC and CTR21. Several countries including the Czech Republic, Poland, South Africa, and South Korea require a maximum ringer impedance. For Poland, South Africa, and South Korea, the maximum ringer impedance specification can be met with an internally-synthesized impedance by setting the RZ bit (U67, bit 1). Billing Tone Detection "Billing tones" or "metering pulses" generated by the central office can cause modem connection difficulties. The billing tone is typically a 12 kHz or 16 kHz signal and is sometimes used in Germany, Switzerland, and South Africa. Depending on line conditions, the billing tone may be large enough to cause major modem errors. The Si2456/33/14 chipset can provide feedback when a billing tone occurs and when it ends. Billing tone detection is enabled by setting the BTE bit (U68, bit 2). Billing tones less than 1.1 VPK on the line are filtered out by the low-pass digital filter on the Si2456/33/14. The ROV bit (U68, bit 1) is set when a line signal is greater than 1.1 VPK indicating a receive overload condition. The BTD bit is set when a line signal (billing tone) is large enough to excessively reduce the line-derived power supply of the line-side device (Si3015). When the BTD bit is set, the dc termination is changed to an 800 dc impedance. This ensures minimum line voltage levels even in the presence of billing tones. The OVL bit should be polled following billing tone detection. When the OVL bit returns to 0, indicating that Pulse Dialing Pulse dialing is accomplished by going off- and on-hook to generate make and break pulses. The nominal rate is 10 pulses per second. Some countries have very tight specifications for pulse fidelity including make and break times, make resistance, and rise and fall times. In a traditional solid-state dc holding circuit, there are a number of issues in meeting these requirements. The Si2456/33/14 dc holding circuit has active control of the on-hook and off-hook transients to maintain pulse dialing fidelity. Spark quenching requirements in countries, such as Italy, the Netherlands, South Africa, and Australia deal with the on-hook transition during pulse dialing. These tests provide an inductive dc feed resulting in a large voltage spike. This spike is caused by the line inductance and the sudden decrease in current through the loop when going on-hook. The traditional way of dealing with this problem is to put a parallel RC shunt across the hookswitch relay. The capacitor is large Rev. 0.9 69 Si2456/SI2433/Si2414 the billing tone has passed, the BTE bit should be written to 0 to return the dc termination to its original state. It takes approximately one second to return to normal dc operating conditions. The BTD and ROV bits are sticky, and they must be written to 0 to be reset. After the BTE, ROV, and BTD bits are all cleared, the BTE bit can be set to re-enable billing tone detection. Certain line events, such as an off-hook event on a parallel phone or a polarity reversal, may trigger the ROV or the BTD bits, after which the billing tone detector must be reset. Look for multiple events before qualifying if billing tones are actually present. Although the DAA remains off-hook during a billing tone event, the received data from the line is corrupted (or a modem disconnect or retrain may occur) in the presence of large billing tones. To receive data through a billing tone, an external LC filter must be added. A modem manufacturer can provide this filter to users in the form of a dongle that connects on the phone line before the DAA. This keeps the manufacturer from having to include a costly LC filter internal to the modem when it may only be necessary to support a few countries/ customers. Alternatively, when a billing tone is detected, the host software may notify the user that a billing tone has occurred. This notification can be used to prompt the user to contact the telephone company and have the billing tones disabled or to purchase an external LC filter. C1 C2 L3 TIP FROM LINE L4 C3 To DAA RING Figure 13. Billing Tone Filter Table 23. Component Values--Optional Billing Tone Filters Symbol Value C1,C2 C3 L3 L4 0.027 F, 50 V, 10% 0.01 F, 250 V, 10% 3.3 mH, >120 mA, <10 , 10% 10 mH, >40 mA, <10 , 10% Billing Tone Filter (Optional) To operate without degradation during billing tones in Germany, Switzerland, and South Africa, an external LC notch filter is required. (The Si3015 can remain off-hook during a billing tone event, but modem data is lost (or a modem disconnect or retrain may occur) in the presence of large billing tone signals.) The notch filter design requires two notches, one at 12 kHz and one at 16 kHz. Because these components are expensive and few countries supply billing tone support, this filter is typically placed in an external dongle or added as a population option for these countries. Figure 13 shows an example billing tone filter. L3 must carry the entire loop current. The series resistance of the inductors is important to achieve a narrow and deep notch. This design has more than 25 dB of attenuation at 12 and 16 kHz. In-Circuit Testing The Si2456/33/14's advanced design provides the system manufacturer with increased ability to determine system functionality during production line tests as well as support for end-user diagnostics. In addition to the local echo, a loopback mode exists allowing increased coverage of system components. For the loopback test mode, a line-side power source is required. While a standard phone line can be used, the test circuit in Figure 1 on page 6 is adequate. To test communication with the Si2456/33/14 across the UART, the local echo may by used immediately after powerup. The DSP loopback test mode tests the functionality and data transfer from the host to the Si2456/33/14 DSP filters out to the DAA and hybrid, back through the DSP, and back to the host. This is the most comprehensive test and can be executed via the AT&T3 command. Once the AT command is issued, the ISOmodem goes off-hook and 70 Rev. 0.9 Si2456/SI2433/Si2414 runs the ITU V.54 loopback test 3 via the hybrid path in the DAA. After a connection is complete, the ISOmodem issues the "CONNECT xxx" response, and data is passed from the TXD pin, out the loop, and back to the RXD pin. This loopback test is a very complete line test. If desired, further testing is possible by connecting the ISOmodem to a dummy phone line and running any variety of functional tests. A test of the ISOcap link only may be initiated by setting the DL bit (U62, bit 1) = 1 and issuing the AT&T3 command. This test implements the ITU V.54 loopback test 3 but eliminates the hybrid from the path. Finally, a digital-only loopback that does not involve the line-side device (Si3015) may be initiated via the AT&T2 command. This test is also the ITU V.54 loopback test 3. The billing tone filter affects the ac termination and return loss. The current complex ac termination passes worldwide return loss specifications with and without the billing tone filter by at least 3 dB. The ac termination is optimized for frequency response and hybrid cancellation while having greater than 4 dB of margin with or without the dongle for South African, Australian, CTR21, German, and Swiss country-specific specifications. Rev. 0.9 71 Si2456/SI2433/Si2414 APPENDIX B-- UL 1950 3RD ED I T I O N Introduction Designs using the Si2456/33/14 pass all overcurrent and overvoltage tests for UL1950 3rd Edition compliance with a couple of considerations. Figure 14 shows the designs that can pass the UL1950 overvoltage tests as well as electromagnetic emissions. The top schematic of Figure 14 shows the configuration in which the ferrite beads (FB1, FB2) are on the unprotected side of the sidactor (RV1). For this configuration, the current rating of the ferrite beads must be 6 A. The bottom schematic of Figure 14 C24 configuration in which the ferrite beads (FB1, FB2) are on the protected side of the sidactor (RV1). For this design, the ferrite beads can be rated at 200 mA. In a cost-optimized design, it is important to remember that compliance to UL1950 does not always require overvoltage tests. It is best to plan ahead and know which overvoltage test applies to your system. Systemlevel elements in the construction, such as fire enclosure and spacing requirements, need to be considered during the design stages. Consult with your Professional Testing Agency during the design of the product to determine which tests apply to your system. shows the 75 @ 100 MHz, 6A 1.25 A FB1 TIP Fuse/PTC RV1 75 @ 100 MHz, 6A FB2 RING C25 Note: In this configuration, C24 and C25 are used for em issions testing. 1000 @ 100 MHz, 200 m A C24 FB1 1.25 A TIP Fuse/PTC RV1 1000 @ 100 MHz, 200 m A FB2 RING C25 Figure 14. Circuits that Pass all UL1950 Overvoltage Tests 72 Rev. 0.9 Si2456/SI2433/Si2414 APPENDIX C-- USER- ACCESS REGISTER SETTINGS Introduction This appendix outlines many of the user-access register settings required for international homologation. Table 24. User-Access Register Values Dial Tone Busy Tone Call Call Progress Progress Filter Filter (Table 25) (Table 25) Country DTON (U15) DTOF (U16) BTON (U2C) BTOF (U2D) USA and UK like countries*, Australia, Austria, Cyprus, Czechoslovakia, Denmark, Greece, Hungary, Israel, Japan, Korea, Malaysia, New Zealand, Poland, Singapore, Slovakia, Taiwan Norway Switzerland, Finland Sweden The Netherlands Germany, Slovenia France Portugal Belgium Italy Spain 310/510 310/510 0x00A0 0x0070 0x00A0 0x0070 310/510 325/550 325/550 100/550 300/480 300/480 300/480 400/440 400/440 320/630 310/510 325/550 325/550 325/550 300/480 300/480 300/480 400/440 400/440 320/630 0x00A0 0x0580 0x0A80 0x0300 0x0150 0x0190 0x0258 0x0150 0x0060 0x0055 0x0070 0x0550 0x0A50 0x02D0 0x0120 0x0160 0x0258 0x0120 0x0030 0x0035 0x00B0 0x0580 0x0230 0x0700 0x0070 0x00AA 0x0258 0x0060 0x0060 0x0072 0x0080 0x0550 0x0200 0x06D0 0x0040 0x007A 0x0258 0x0030 0x0030 0x0042 *Note: USA-like countries: Argentina, Bolivia, Brazil, Canada, Chile, Colombia, Costa Rica, India, Indonesia, Guatemala, Panama, Peru, Puerto Rico, Russia, Thailand, Trinidad, Uruguay, USA, and Venezuela. UK-like countries: Bahrain, China, Ecuador, Egypt, Hong Kong, Ireland, Kuwait, Lebanon, Oman, Philippines, Saudi Arabia, South Africa, Turkey, UAE, and the UK. Rev. 0.9 73 Si2456/SI2433/Si2414 Table 25. BPF Biquad Values BPF Biquad Values Stage 1 Stage 2 310/510 Stage 3 Stage 4 Output Scalar A0 B1 B2 A2 A1 K A0 B1 B2 A2 A1 K A0 B1 B2 A2 A1 K A0 B1 B2 A2 A1 K A0 B1 B2 A2 A1 0x0800 0x0000 0x0000 0x0000 0x0000 -- 0x0800 0x0000 0x0000 0x0000 0x0000 -- 0x0078 0x67EF 0xC4FA 0x4000 0x0214 -- 0x0100 0x71CC 0xC777 0x4000 0x81C2 -- 0x0800 0x7DAF 0xC1D5 0x4000 0x8000 0x00A0 0x6EF1 0xC4F4 0xC000 0x0000 -- 300/480 0x00A0 0x78B0 0xC305 0x4000 0xB50A -- 0x01A0 0x7905 0xC311 0x4000 0xA7BE -- 320/630 0x0400 0x70D2 0xC830 0x4000 0x80E2 -- 0x03A0 0x7061 0xC8EF 0x4000 0x8128 -- 0x0330 0x7235 0xC821 0x4000 0x815C -- 0x0600 0x68F7 0xC451 0x4000 0xFCA6 -- 0x01C0 0x6151 0xDC9B 0x4000 0x8019 -- -- -- -- -- 0x0009 -- -- -- -- -- 0x0009 -- -- -- -- -- 0x0008 -- -- -- -- -- 0x0009 -- -- -- -- -- 0x01A0 0x6E79 0xC548 0xC000 0x0000 -- 0x0210 0x79E0 0xC252 0x4000 0x8052 -- 325/550 0x0330 0x68C0 0xCB6C 0x4000 0xB1DC -- 0x0600 0x69B9 0xC9E4 0x4000 0xAFE9 -- 100/550 0x0600 0x78EF 0xC245 0x4000 0x806E -- 0x01C0 0x5629 0xCF51 0xC000 0x0000 0x01C0 0x7E3F 0xC18A 0x4000 0xB96A 74 Rev. 0.9 Si2456/SI2433/Si2414 Table 25. BPF Biquad Values (Continued) BPF Biquad Values Stage 1 Stage 2 Stage 3 Stage 4 Output Scalar K A0 B1 B2 A2 A1 K -- 0x0020 0x7448 0xC0F6 0x4000 0x96AB -- -- 400/440 -- 0x0400 0x73D5 0xC2A4 0x4000 0x8D93 -- -- 0x0040 0x75A7 0xC26B 0x4000 0x85C1 -- 0x0005 -- -- -- -- -- 0x0008 0x0200 0x7802 0xC0CB 0x4000 0x8359 -- Rev. 0.9 75 Si2456/SI2433/Si2414 APPENDIX D--TYPICAL MO D E M A P P L I C A T I O N S EX A M P L E S Introduction Steps required to configure the Si2456/33/14 for modem operation under typical examples are outlined below. The ISOmodem has been designed to be easy to use and flexible. The Si2456/33/14 has many features and modes that add to the complexity of the device but are not required for a typical modem configuration. The following examples help the user quickly make a modem connection and begin evaluation of the Si2456/ 33/14 under various operational scenarios. 7. ATDT15128675309 Example 4: V.32bis in South Korea with Japan Caller ID 1. Power on reset. 2. Set host UART to 19.2 kbps. 3. AT:U67,0006 - DAA PTT settings for South Korea. 4. AT&H4 - limit Si2456/33/14 to V.32bis 5. AT+VCST=3 - enable Japan caller ID. 6. ATDT15128675309 Example 1: V.90 in FCC Countries 1. Power on reset. 2. Set host UART to 19.2 kbps. 3. AT\T12 - set ISOmodem UART to 115.2 kbps. 4. Set host UART to 115.2 kbps. 5. ATDT15128675309 Example 2: 33600 bps in Norway 1. Power on reset. 2. Set host UART to 19.2 kbps. 3. AT\T12 - set ISOmodem UART to 115.2 kbps. 4. Set host UART to 115.2 kbps. 5. AT&H2 - limit Si2456 to V.34. 6. AT:U2C,00B0,0080 -Busy tone cadence set for Norway. 7. AT:U67,000C,0010,0004:U4D,0001 - DAA PTT settings for Norway. 8. ATDT15128675309 Example 3: V.22 in Australia with Parallel Phone Detection 1. Power on reset. 2. Set host UART to 19.2 kbps. 3. AT&H7 - limit Si2456/33/14 to V.22 only. 4. AT:U67,0064 - DAA PTT settings for Australia. 5. AT:U70,2400 - Enable off-hook intrusion interrupt. 6. AT:R79 - Check for phone in-use before dial. 76 Rev. 0.9 Si2456/SI2433/Si2414 Pin Descriptions: Si2456/33/14 CLKIN/XTALI XTALO CLKOUT/A0 D6 VD3.3 GND VDA RTS/D7 RXD/RD TXD/WR CTS/CS RESET 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 D5 DCD/D4 ESC/D3 C1A ISOB VD3.3 GND VDB D2 RI/D1 INT/D0 AOUT/INT Pin # Pin Name Description Clock Input/Crystal Oscillator Pin. This pin provides support for parallel resonant, AT cut crystals. XTALI also acts as an input in the event that an external clock source is used in place of a crystal. A 4.9152 MHz crystal or 4.9152 MHz clock is required. Crystal Oscillator Pin. This pin provides support for parallel-resonant AT-cut crystals. XTALO serves as the output of the crystal amplifier. Clock Output/Address Bit 0. Clock output in serial mode. Address Enable in parallel mode. Data Bit. Bidirectional parallel bus data bit 6 in parallel mode. Digital Supply Voltage. Provides the 3.3 V digital supply voltage to the Si2456/33/14. Ground. Connects to the system digital ground. Digital Rail. Pin provides additional power supply voltage to the Si2456/33/14. Request-to-Send/Data Bit. Request-to-send (for flow control) in serial mode. Bidirectional parallel bus data bit 7 in parallel mode. Receive Data/Read Enable. Data output to DTE RXD pin in serial mode. Active low read enable pin in parallel mode. Transmit Data/Write Enable. Data input from DTE TXD pin in serial mode. Active low write enable pin in parallel mode. 1 CLKIN/XTALI 2 XTALO 3 4 5, 19 6, 18 7,17 8 CLKOUT/A0 D6 VD3.3 GND VDA, VDB RTS/D7 9 RXD/RD 10 TXD/WR Rev. 0.9 77 Si2456/SI2433/Si2414 Pin # Pin Name Description Clear-to-Send/Chip Select. Active low clear-to-send (for flow control) in serial mode. Active low chip select in parallel mode. Reset Input. An active low input that is used to reset all control registers to a defined initialized state. Analog Output/Interrupt Output. Analog output in serial mode. Active low interrupt output in parallel mode. Interrupt Output/Data Bit. Active low interrupt output in serial mode. Bidirectional parallel bus data bit 0 in parallel mode. Ring Indicator/Data Bit. The RI on (active low) indicates the presence of an ON segment of a ring signal on the telephone line. Bidirectional parallel bus data bit 1 in parallel mode. Data Bit. Bidirectional parallel bus data bit 2 in parallel mode. Isolink Bias Voltage. This pin should be connected via the C3 capacitor. Isolation Capacitor 1A. Connects to one side of the isolation capacitor, C1. Escape/Data Bit. Hardware escape in serial mode. Bidirectional parallel bus data bit 3 in parallel mode. Carrier Detect/Data Bit. Active low carrier detect in serial mode. Bidirectional parallel bus data bit 4 in parallel mode. Data Bit. Bidirectional parallel bus data bit 5 in parallel mode. 11 CTS/CS 12 RESET 13 14 AOUT/INT INT/D0 15 RI/D1 16 20 21 22 23 D2 ISOB C1A ESC/D3 DCD/D4 24 D5 78 Rev. 0.9 Si2456/SI2433/Si2414 Pin Descriptions: Si3015 QE2 DCT IGND C1B RNG1 RNG2 QB QE 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 FILT2 FILT RX REXT REXT2 REF VREG2 VREG Pin # Pin Name Description Transistor Emitter 2. Connects to the emitter of Q4. DC Termination. Provides dc termination to the telephone network. Isolated Ground. Connects to ground on the line-side interface. Also connects to capacitor C2. Isolation Capacitor 1B. Connects to one side of isolation capacitor C1. Ring 1. Connects through a capacitor to the TIP lead of the telephone line. Provides the ring and caller ID signals to the modem. Ring 2. Connects through a capacitor to the RING lead of the telephone line. Provides the ring and caller ID signals to the modem. Transistor Base. Connects to the base of transistor Q3. Transistor Emitter. Connects to the emitter of transistor Q3. Voltage Regulator. Connects to an external capacitor to provide bypassing for an internal power supply. Voltage Regulator 2. Connects to an external capacitor to provide bypassing for an internal power supply. Reference. Connects to an external resistor to provide a high-accuracy reference current. External Resistor 2. Sets the complex ac termination impedance. External Resistor. Sets the real ac termination impedance. 1 2 3 4 5 QE2 DCT IGND C1B RNG1 6 RNG2 7 8 9 10 11 12 13 QB QE VREG VREG2 REF REXT2 REXT Rev. 0.9 79 Si2456/SI2433/Si2414 Pin # Pin Name Description Receive Input. Serves as the receive side input from the telephone network. Filter. Provides filtering for the dc termination circuits. Filter 2. Provides filtering for the bias circuits. 14 15 16 RX FILT FILT2 80 Rev. 0.9 Si2456/SI2433/Si2414 Ordering Guide Chipset Region Power Supply Digital Line Temperature Si2456 Si2456 SI2433 SI2433 Si2414 Si2414 Global Global Global Global Global Global 3.3 V Digital 3.3 V Digital 3.3 V Digital 3.3 V Digital 3.3 V Digital 3.3 V Digital Si2456-KT Si2456-BT SI2433-KT SI2433-BT Si2414-KT Si2414-BT Si3015-KS Si3015-BS Si3015-KS Si3015-BS Si3015-KS Si3015-BS 0 to 70 C -40 to 85 C 0 to 70 C -40 to 85 C 0 to 70 C -40 to 85 C Rev. 0.9 81 Si2456/SI2433/Si2414 Package Outline: TSSOP Figure 15 illustrates the package details for the Si2456/33/14. Table 26 lists the values for the dimensions shown in the illustration. 2 S R1 R 1 E1 E L L1 e 3 D A2 A c b A1 Figure 15. 24-Pin Thin Small Shrink Outline Package (TSSOP) Table 26. Package Diagram Dimensions Symbol Min -- 0.05 0.80 0.19 0.09 7.70 Millimeters Nom 1.10 -- 1.00 -- -- 7.80 0.65 BSC 6.40 BSC 4.40 0.60 1.00 REF -- -- -- -- 12 REF 12 REF Max 1.20 0.15 1.05 0.30 0.20 7.90 A A1 A2 b c D e E E1 L L1 R R1 S 1 2 3 4.30 0.45 0.09 0.09 0.20 0 4.50 0.75 -- -- -- 8 82 Rev. 0.9 Si2456/SI2433/Si2414 Package Outline: SOIC Figure 16 illustrates the package details for the Si3015. Table 27 lists the values for the dimensions shown in the illustration. 16 9 h E H 0.010 GAUGE PLANE L Detail F 1 B 8 D A2 e A1 A C L1 See Detail F Seating Plane Weight: Approximate device weight is 0.15 grams. Figure 16. 16-Pin Small Outline Integrated Circuit (SOIC) Package Table 27. Package Diagram Dimensions Symbol Millimeters Min Max 1.35 1.75 .10 .25 1.30 1.50 .33 .51 .19 .25 9.80 10.01 3.80 4.00 1.27 BSC -- 5.80 6.20 .25 .50 .40 1.27 1.07BSC -- -- 0.10 0 8 A A1 A2 B C D E e H h L L1 Rev. 0.9 83 Si2456/SI2433/Si2414 Document Change List Revision 0.81 to Revision 0.9. Removed Wake-on-Ring mode (AT&Z) and associated ID specification in Table 3. Removed FULL bit (U69, bit 7). Added \N0 commands to Table 9. Added V.22bis Transparent HDLC mode to Table 9. Removed PCM mode and associated U71 register. Removed :Dn and :Fn commands. Simplified some Parallel Phone Detection text. Removed RST bit (U70, bit 5). Added V22HD bit (U7A, bit 2). Removed Ringer Impedance and Billing Tone notes, tables, and figures for Czech Republic in "Appendix A--DAA Operation". Added DOP bit (U7A, bit 7) Added U7A, U7C registers Added FOH bit (U62, bit 2) Added /A metacharacter (Table 10) 84 Rev. 0.9 Si2456/SI2433/Si2414 Notes: Rev. 0.9 85 Si2456/SI2433/Si2414 Contact Information Silicon Laboratories Inc. 4635 Boston Lane Austin, TX 78735 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Email: productinfo@silabs.com Internet: www.silabs.com The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where personal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized application, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories, Silicon Labs, ISOmodem, and ISOcap are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. 86 Rev. 0.9 |
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